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Commit c9332281 authored by Clarence Ip's avatar Clarence Ip Committed by Gerrit - the friendly Code Review server
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drm/msm/sde: limit primary plane count to number of crtcs 



DRM primary planes are meant for dedicated use by a single CRTC,
so limit the number of planes flagged as 'primary' to the max
number of CRTC's that will be created.

Change-Id: Ia0626a81d033d2c554408cda29a2e6fbe32a6667
Signed-off-by: default avatarClarence Ip <cip@codeaurora.org>
parent 42ddcec5

drivers/gpu/drm/msm/sde/sde_kms.c

+26 −13
Original line number Diff line number Diff line
@@ -302,27 +302,44 @@ static void sde_kms_prepare_fence(struct msm_kms *kms, 


static int modeset_init(struct sde_kms *sde_kms)

{

	struct drm_device *dev = sde_kms->dev;

	struct drm_device *dev;

	struct drm_plane *primary_planes[MAX_PLANES], *plane;

	struct drm_crtc *crtc;



	struct msm_drm_private *priv = sde_kms->dev->dev_private;

	struct sde_mdss_cfg *catalog = sde_kms->catalog;

	struct msm_drm_private *priv;

	struct sde_mdss_cfg *catalog;



	int primary_planes_idx, i, ret;

	int max_crtc_count, max_plane_count;



	if (!sde_kms || !sde_kms->dev) {

		SDE_ERROR("invalid sde_kms\n");

		return -EINVAL;

	}



	dev = sde_kms->dev;

	priv = dev->dev_private;

	catalog = sde_kms->catalog;



	/* Enumerate displays supported */

	sde_encoders_init(dev);



	int primary_planes_idx = 0, i, ret, max_crtc_count;

	int max_private_planes = catalog->mixer_count;

	max_crtc_count = min(catalog->mixer_count, priv->num_encoders);

	max_plane_count = min_t(u32, catalog->sspp_count, MAX_PLANES);



	/* Create the planes */

	for (i = 0; i < catalog->sspp_count; i++) {

	primary_planes_idx = 0;

	for (i = 0; i < max_plane_count; i++) {

		bool primary = true;



		if (catalog->sspp[i].features & BIT(SDE_SSPP_CURSOR)

			|| primary_planes_idx > max_private_planes)

			|| primary_planes_idx >= max_crtc_count)

			primary = false;



		plane = sde_plane_init(dev, catalog->sspp[i].id, primary);

		plane = sde_plane_init(dev, catalog->sspp[i].id, primary,

				(1UL << max_crtc_count) - 1);

		if (IS_ERR(plane)) {

			DRM_ERROR("sde_plane_init failed\n");

			SDE_ERROR("sde_plane_init failed\n");

			ret = PTR_ERR(plane);

			goto fail;

		}
@@ -332,10 +349,6 @@ static int modeset_init(struct sde_kms *sde_kms) 
			primary_planes[primary_planes_idx++] = plane;

	}



	/* Enumerate displays supported */

	sde_encoders_init(dev);



	max_crtc_count = min(catalog->mixer_count, priv->num_encoders);

	max_crtc_count = min(max_crtc_count, primary_planes_idx);



	/* Create one CRTC per encoder */

drivers/gpu/drm/msm/sde/sde_kms.h

+2 −1
Original line number Diff line number Diff line
@@ -399,7 +399,8 @@ void sde_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); 
enum sde_sspp sde_plane_pipe(struct drm_plane *plane);

void sde_plane_flush(struct drm_plane *plane);

struct drm_plane *sde_plane_init(struct drm_device *dev,

		uint32_t pipe, bool primary_plane);

		uint32_t pipe, bool primary_plane,

		unsigned long possible_crtcs);



/**

 * sde_plane_wait_input_fence - wait for input fence object

drivers/gpu/drm/msm/sde/sde_plane.c

+4 −4
Original line number Diff line number Diff line
@@ -1879,7 +1879,8 @@ static void _sde_plane_init_debugfs(struct sde_plane *psde, struct sde_kms *kms) 


/* initialize plane */

struct drm_plane *sde_plane_init(struct drm_device *dev,

		uint32_t pipe, bool primary_plane)

		uint32_t pipe, bool primary_plane,

		unsigned long possible_crtcs)

{

	struct drm_plane *plane = NULL;

	struct sde_plane *psde;
@@ -1962,9 +1963,8 @@ struct drm_plane *sde_plane_init(struct drm_device *dev, 
		type = DRM_PLANE_TYPE_PRIMARY;

	else

		type = DRM_PLANE_TYPE_OVERLAY;

	ret = drm_universal_plane_init(dev, plane, 0xff, &sde_plane_funcs,

				psde->formats, psde->nformats,

				type);

	ret = drm_universal_plane_init(dev, plane, possible_crtcs,

			&sde_plane_funcs, psde->formats, psde->nformats, type);

	if (ret)

		goto clean_sspp;