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Commit c706bfb5 authored by Divy Le Ray's avatar Divy Le Ray Committed by Jeff Garzik
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cxgb3 - Fix direct XAUI support



Check all lanes for link status on direct XAUI cards.
Don't assume that direct XAUI always uses XGMAC 1.

Signed-off-by: default avatarDivy Le Ray <divy@chelsio.com>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 890de332
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+8 −2
Original line number Diff line number Diff line
@@ -219,7 +219,13 @@ static int xaui_direct_get_link_status(struct cphy *phy, int *link_ok,
		unsigned int status;

		status = t3_read_reg(phy->adapter,
				     XGM_REG(A_XGM_SERDES_STAT0, phy->addr));
				     XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) |
		    t3_read_reg(phy->adapter,
				XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) |
		    t3_read_reg(phy->adapter,
				XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) |
		    t3_read_reg(phy->adapter,
				XGM_REG(A_XGM_SERDES_STAT3, phy->addr));
		*link_ok = !(status & F_LOWSIG0);
	}
	if (speed)
@@ -247,5 +253,5 @@ static struct cphy_ops xaui_direct_ops = {
void t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
			     int phy_addr, const struct mdio_ops *mdio_ops)
{
	cphy_init(phy, adapter, 1, &xaui_direct_ops, mdio_ops);
	cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops);
}
+2 −0
Original line number Diff line number Diff line
@@ -2128,6 +2128,8 @@
#define F_RESETPLL01    V_RESETPLL01(1U)

#define A_XGM_SERDES_STAT0 0x8f0
#define A_XGM_SERDES_STAT1 0x8f4
#define A_XGM_SERDES_STAT2 0x8f8

#define S_LOWSIG0    0
#define V_LOWSIG0(x) ((x) << S_LOWSIG0)