Loading arch/arm/boot/dts/qcom/sdm660-coresight.dtsi +0 −160 Original line number Diff line number Diff line Loading @@ -1133,14 +1133,6 @@ <&funnel_qatb_in_tpda>; }; }; port@1 { reg = <1>; tpda_in_funnel_gpu_dl: endpoint { slave-mode; remote-endpoint = <&funnel_gpu_dl_out_tpda>; }; }; port@2 { reg = <2>; tpda_in_funnel_dlct: endpoint { Loading Loading @@ -1200,60 +1192,6 @@ }; }; funnel_gpu_dl: funnel@7140000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b908>; reg = <0x7140000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-gpu-dl"; clocks = <&clock_rpmcc RPM_QDSS_CLK>, <&clock_rpmcc RPM_QDSS_A_CLK>; clock-names = "apb_pclk", "core_a_clk"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_gpu_dl_out_tpda: endpoint { remote-endpoint = <&tpda_in_funnel_gpu_dl>; }; }; port@2 { reg = <0>; funnel_gpu_dl_in_tpdm_gpu: endpoint { slave-mode; remote-endpoint = <&tpdm_gpu_out_funnel_gpu_dl>; }; }; }; }; tpdm_gpu: tpdm@7111000 { status = "disabled"; compatible = "qcom,coresight-tpdm"; reg = <0x7111000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-gpu"; clocks = <&clock_rpmcc RPM_QDSS_CLK>, <&clock_rpmcc RPM_QDSS_A_CLK>; clock-names = "core_clk", "core_a_clk"; port{ tpdm_gpu_out_funnel_gpu_dl: endpoint { remote-endpoint = <&funnel_gpu_dl_in_tpdm_gpu>; }; }; }; tpdm_vsense: tpdm@7038000 { compatible = "qcom,coresight-tpdm"; reg = <0x7038000 0x1000>; Loading Loading @@ -1613,14 +1551,6 @@ <&tpdm_dlct_out_funnel_dlct>; }; }; port@3 { reg = <3>; funnel_dlct_in_funnel_wcss: endpoint { slave-mode; remote-endpoint = <&funnel_wcss_out_funnel_dlct>; }; }; port@4 { reg = <1>; funnel_dlct_in_audio_etm0: endpoint { Loading Loading @@ -1751,94 +1681,4 @@ }; }; }; funnel_wcss: funnel@719e000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b908>; reg = <0x719e000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-wcss"; clocks = <&clock_rpmcc RPM_QDSS_CLK>, <&clock_rpmcc RPM_QDSS_A_CLK>; clock-names = "apb_pclk", "core_a_clk"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_wcss_out_funnel_dlct: endpoint { remote-endpoint = <&funnel_dlct_in_funnel_wcss>; }; }; port@1 { reg = <1>; funnel_wcss_in_tpda_wcss: endpoint { slave-mode; remote-endpoint = <&tpda_wcss_out_funnel_wcss>; }; }; }; }; tpda_wcss: tpda@719d000 { status = "disabled"; compatible = "qcom,coresight-tpda"; reg = <0x719d000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-wcss"; qcom,tpda-atid = <70>; qcom,dsb-elem-size = <0 32>; clocks = <&clock_rpmcc RPM_QDSS_CLK>, <&clock_rpmcc RPM_QDSS_A_CLK>; clock-names = "core_clk", "core_a_clk"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; tpda_wcss_out_funnel_wcss: endpoint { remote-endpoint = <&funnel_wcss_in_tpda_wcss>; }; }; port@1 { reg = <0>; tpda_wcss_in_tpdm_wcss: endpoint { slave-mode; remote-endpoint = <&tpdm_wcss_out_tpda_wcss>; }; }; }; }; tpdm_wcss: tpdm@719c000 { status = "disabled"; compatible = "qcom,coresight-tpdm"; reg = <0x719c000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-wcss"; clocks = <&clock_rpmcc RPM_QDSS_CLK>, <&clock_rpmcc RPM_QDSS_A_CLK>; clock-names = "core_clk", "core_a_clk"; port{ tpdm_wcss_out_tpda_wcss: endpoint { remote-endpoint = <&tpda_wcss_in_tpdm_wcss>; }; }; }; }; Loading
arch/arm/boot/dts/qcom/sdm660-coresight.dtsi +0 −160 Original line number Diff line number Diff line Loading @@ -1133,14 +1133,6 @@ <&funnel_qatb_in_tpda>; }; }; port@1 { reg = <1>; tpda_in_funnel_gpu_dl: endpoint { slave-mode; remote-endpoint = <&funnel_gpu_dl_out_tpda>; }; }; port@2 { reg = <2>; tpda_in_funnel_dlct: endpoint { Loading Loading @@ -1200,60 +1192,6 @@ }; }; funnel_gpu_dl: funnel@7140000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b908>; reg = <0x7140000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-gpu-dl"; clocks = <&clock_rpmcc RPM_QDSS_CLK>, <&clock_rpmcc RPM_QDSS_A_CLK>; clock-names = "apb_pclk", "core_a_clk"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_gpu_dl_out_tpda: endpoint { remote-endpoint = <&tpda_in_funnel_gpu_dl>; }; }; port@2 { reg = <0>; funnel_gpu_dl_in_tpdm_gpu: endpoint { slave-mode; remote-endpoint = <&tpdm_gpu_out_funnel_gpu_dl>; }; }; }; }; tpdm_gpu: tpdm@7111000 { status = "disabled"; compatible = "qcom,coresight-tpdm"; reg = <0x7111000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-gpu"; clocks = <&clock_rpmcc RPM_QDSS_CLK>, <&clock_rpmcc RPM_QDSS_A_CLK>; clock-names = "core_clk", "core_a_clk"; port{ tpdm_gpu_out_funnel_gpu_dl: endpoint { remote-endpoint = <&funnel_gpu_dl_in_tpdm_gpu>; }; }; }; tpdm_vsense: tpdm@7038000 { compatible = "qcom,coresight-tpdm"; reg = <0x7038000 0x1000>; Loading Loading @@ -1613,14 +1551,6 @@ <&tpdm_dlct_out_funnel_dlct>; }; }; port@3 { reg = <3>; funnel_dlct_in_funnel_wcss: endpoint { slave-mode; remote-endpoint = <&funnel_wcss_out_funnel_dlct>; }; }; port@4 { reg = <1>; funnel_dlct_in_audio_etm0: endpoint { Loading Loading @@ -1751,94 +1681,4 @@ }; }; }; funnel_wcss: funnel@719e000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x0003b908>; reg = <0x719e000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-wcss"; clocks = <&clock_rpmcc RPM_QDSS_CLK>, <&clock_rpmcc RPM_QDSS_A_CLK>; clock-names = "apb_pclk", "core_a_clk"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_wcss_out_funnel_dlct: endpoint { remote-endpoint = <&funnel_dlct_in_funnel_wcss>; }; }; port@1 { reg = <1>; funnel_wcss_in_tpda_wcss: endpoint { slave-mode; remote-endpoint = <&tpda_wcss_out_funnel_wcss>; }; }; }; }; tpda_wcss: tpda@719d000 { status = "disabled"; compatible = "qcom,coresight-tpda"; reg = <0x719d000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-wcss"; qcom,tpda-atid = <70>; qcom,dsb-elem-size = <0 32>; clocks = <&clock_rpmcc RPM_QDSS_CLK>, <&clock_rpmcc RPM_QDSS_A_CLK>; clock-names = "core_clk", "core_a_clk"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; tpda_wcss_out_funnel_wcss: endpoint { remote-endpoint = <&funnel_wcss_in_tpda_wcss>; }; }; port@1 { reg = <0>; tpda_wcss_in_tpdm_wcss: endpoint { slave-mode; remote-endpoint = <&tpdm_wcss_out_tpda_wcss>; }; }; }; }; tpdm_wcss: tpdm@719c000 { status = "disabled"; compatible = "qcom,coresight-tpdm"; reg = <0x719c000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-wcss"; clocks = <&clock_rpmcc RPM_QDSS_CLK>, <&clock_rpmcc RPM_QDSS_A_CLK>; clock-names = "core_clk", "core_a_clk"; port{ tpdm_wcss_out_tpda_wcss: endpoint { remote-endpoint = <&tpda_wcss_in_tpdm_wcss>; }; }; }; };