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Commit c64b04fe authored by Jaswinder Singh Rajput's avatar Jaswinder Singh Rajput Committed by H. Peter Anvin
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x86, cpu: cpu/proc.c display cache alignment and address sizes for 32 bit 



32 bits can also access x86_cache_alignment, x86_phys_bits and
x86_virt_bits, make them available to user space just as on 64 bits.

Signed-off-by: default avatarJaswinder Singh Rajput <jaswinderrajput@gmail.com>
LKML-Reference: <1244921390.11733.30.camel@ht.satnam>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent 44b7532b

arch/x86/kernel/cpu/proc.c

+0 −2
Original line number Original line Diff line number Diff line
@@ -116,11 +116,9 @@ static int show_cpuinfo(struct seq_file *m, void *v) 
		seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);

		seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);

#endif

#endif

	seq_printf(m, "clflush size\t: %u\n", c->x86_clflush_size);

	seq_printf(m, "clflush size\t: %u\n", c->x86_clflush_size);

#ifdef CONFIG_X86_64

	seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);

	seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);

	seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",

	seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",

		   c->x86_phys_bits, c->x86_virt_bits);

		   c->x86_phys_bits, c->x86_virt_bits);

#endif





	seq_printf(m, "power management:");

	seq_printf(m, "power management:");

	for (i = 0; i < 32; i++) {

	for (i = 0; i < 32; i++) {