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Commit c2a2da2c authored by Yuanyuan Liu's avatar Yuanyuan Liu
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ARM: dts: msm: Add bus bandwidth entry for ICNSS 



Add bus bandwidth entry for ICNSS. It will be used to vote for
aggre2_noc_clk for SMMU.

CRs-Fixed: 1053538
Change-Id: Ic7523e68d65634f28babac6d17e0b02311d7ad79
Signed-off-by: default avatarYuanyuan Liu <yuanliu@codeaurora.org>
parent a207e02a

arch/arm/boot/dts/qcom/msmcobalt.dtsi

+5 −2
Original line number Diff line number Diff line
@@ -2732,8 +2732,6 @@ 
		      <0xb0000000 0x10000>;

		reg-names = "membase", "mpm_config",

			    "smmu_iova_base", "smmu_iova_ipa";

		clocks = <&clock_gcc clk_aggre2_noc_clk>;

		clock-names = "smmu_aggre2_noc_clk";

		iommus = <&anoc2_smmu 0x1900>,

			 <&anoc2_smmu 0x1901>;

		interrupts = <0 413 0 /* CE0 */ >,
@@ -2751,6 +2749,11 @@ 
		qcom,wlan-msa-memory = <0x100000>;

		vdd-io-supply = <&pmcobalt_l5>;

		qcom,vdd-io-voltage-level = <800000 800000>;

		qcom,msm-bus,name = "msm-icnss";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps = <81 10065 0 0>,

					    <81 10065 0 16000>;

	};



	wil6210: qcom,wil6210 {