Loading Documentation/DMA-attributes.txt +9 −0 Original line number Diff line number Diff line Loading @@ -132,6 +132,11 @@ DMA_ATTR_FORCE_COHERENT When passed to a DMA map call the DMA_ATTR_FORCE_COHERENT DMA attribute can be used to force a buffer to be mapped as IO coherent. When the DMA_ATTR_FORCE_COHERENT attribute is set during a map call ensure that it is also set during for the matching unmap call to ensure that the correct cache maintenance is carried out. This DMA attribute is only currently supported for arm64 stage 1 IOMMU mappings. Loading @@ -143,5 +148,9 @@ coherent. The DMA_ATTR_FORCE_NON_COHERENT DMA attribute overrides the buffer IO coherency configuration set by making the device IO coherent. When the DMA_ATTR_FORCE_NON_COHERENT attribute is set during a map call ensure that it is also set during for the matching unmap call to ensure that the correct cache maintenance is carried out. This DMA attribute is only currently supported for arm64 stage 1 IOMMU mappings. arch/arm64/mm/dma-mapping.c +1 −3 Original line number Diff line number Diff line Loading @@ -1821,10 +1821,8 @@ static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle, mapping->domain, iova)); int offset = handle & ~PAGE_MASK; int len = PAGE_ALIGN(size + offset); bool iova_coherent = iommu_is_iova_coherent(mapping->domain, handle); if (!(iova_coherent || if (!(is_dma_coherent(dev, attrs) || dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))) __dma_page_dev_to_cpu(page, offset, size, dir); Loading Loading
Documentation/DMA-attributes.txt +9 −0 Original line number Diff line number Diff line Loading @@ -132,6 +132,11 @@ DMA_ATTR_FORCE_COHERENT When passed to a DMA map call the DMA_ATTR_FORCE_COHERENT DMA attribute can be used to force a buffer to be mapped as IO coherent. When the DMA_ATTR_FORCE_COHERENT attribute is set during a map call ensure that it is also set during for the matching unmap call to ensure that the correct cache maintenance is carried out. This DMA attribute is only currently supported for arm64 stage 1 IOMMU mappings. Loading @@ -143,5 +148,9 @@ coherent. The DMA_ATTR_FORCE_NON_COHERENT DMA attribute overrides the buffer IO coherency configuration set by making the device IO coherent. When the DMA_ATTR_FORCE_NON_COHERENT attribute is set during a map call ensure that it is also set during for the matching unmap call to ensure that the correct cache maintenance is carried out. This DMA attribute is only currently supported for arm64 stage 1 IOMMU mappings.
arch/arm64/mm/dma-mapping.c +1 −3 Original line number Diff line number Diff line Loading @@ -1821,10 +1821,8 @@ static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle, mapping->domain, iova)); int offset = handle & ~PAGE_MASK; int len = PAGE_ALIGN(size + offset); bool iova_coherent = iommu_is_iova_coherent(mapping->domain, handle); if (!(iova_coherent || if (!(is_dma_coherent(dev, attrs) || dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))) __dma_page_dev_to_cpu(page, offset, size, dir); Loading