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Commit bf12e894 authored by Daniel Vetter's avatar Daniel Vetter Committed by Greg Kroah-Hartman
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drm/i915: Bail out of pipe config compute loop on LPT 

commit 2700818ac9f935d8590715eecd7e8cadbca552b6 upstream.

LPT is pch, so might run into the fdi bandwidth constraint (especially
since it has only 2 lanes). But right now we just force pipe_bpp back
to 24, resulting in a nice loop (which we bail out with a loud
WARN_ON). Fix this.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
References: https://bugs.freedesktop.org/show_bug.cgi?id=93477


Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
Tested-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1462264381-7573-1-git-send-email-daniel.vetter@ffwll.ch


(cherry picked from commit f58a1acc7e4a1f37d26124ce4c875c647fbcc61f)
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 472f52f5

drivers/gpu/drm/i915/intel_crt.c

+7 −1
Original line number Diff line number Diff line
@@ -248,8 +248,14 @@ static bool intel_crt_compute_config(struct intel_encoder *encoder, 
		pipe_config->has_pch_encoder = true;



	/* LPT FDI RX only supports 8bpc. */

	if (HAS_PCH_LPT(dev))

	if (HAS_PCH_LPT(dev)) {

		if (pipe_config->bw_constrained && pipe_config->pipe_bpp < 24) {

			DRM_DEBUG_KMS("LPT only supports 24bpp\n");

			return false;

		}



		pipe_config->pipe_bpp = 24;

	}



	/* FDI must always be 2.7 GHz */

	if (HAS_DDI(dev)) {