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Commit bc284542 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
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drm/i915: Use the default 600ns LDO programming sequence delay 



Not sure which LDO programming sequence delay should be used for the CHV
PHY, but the spec says that 600ns is "Used by default for initial
bringup", and the BIOS seems to use that, so let's do the same.

Reviewed-by: default avatarDeepak S <deepak.s@linux.intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d63f820f

drivers/gpu/drm/i915/i915_reg.h

+4 −0
Original line number Diff line number Diff line
@@ -2145,6 +2145,10 @@ enum skl_disp_power_wells { 
#define DPIO_PHY_STATUS			(VLV_DISPLAY_BASE + 0x6240)

#define   DPLL_PORTD_READY_MASK		(0xf)

#define DISPLAY_PHY_CONTROL (VLV_DISPLAY_BASE + 0x60100)

#define   PHY_LDO_DELAY_0NS			0x0

#define   PHY_LDO_DELAY_200NS			0x1

#define   PHY_LDO_DELAY_600NS			0x2

#define   PHY_LDO_SEQ_DELAY(delay, phy)		((delay) << (2*(phy)+23))

#define   PHY_CH_SU_PSR				0x1

#define   PHY_CH_DEEP_PSR			0x7

#define   PHY_CH_POWER_MODE(mode, phy, ch)	((mode) << (6*(phy)+3*(ch)+2))

drivers/gpu/drm/i915/intel_runtime_pm.c

+2 −0
Original line number Diff line number Diff line
@@ -1724,6 +1724,8 @@ static void chv_phy_control_init(struct drm_i915_private *dev_priv) 
	 * value.

	 */

	dev_priv->chv_phy_control =

		PHY_LDO_SEQ_DELAY(PHY_LDO_DELAY_600NS, DPIO_PHY0) |

		PHY_LDO_SEQ_DELAY(PHY_LDO_DELAY_600NS, DPIO_PHY1) |

		PHY_CH_POWER_MODE(PHY_CH_SU_PSR, DPIO_PHY0, DPIO_CH0) |

		PHY_CH_POWER_MODE(PHY_CH_SU_PSR, DPIO_PHY0, DPIO_CH1) |

		PHY_CH_POWER_MODE(PHY_CH_SU_PSR, DPIO_PHY1, DPIO_CH0);