Merge tag 'v4.4.26' into android-4.4.y (b8fa4a3e) · Commits · e / devices / android_kernel_sony_msm8998

Makefile

+1 −1

Original line number	Diff line number	Diff line
		VERSION = 4
		PATCHLEVEL = 4
		SUBLEVEL = 24
		SUBLEVEL = 26
		EXTRAVERSION =
		NAME = Blurry Fish Butt

arch/arm/boot/dts/armada-390.dtsi

+3 −0

Original line number	Diff line number	Diff line
		@@ -47,6 +47,8 @@
		#include "armada-39x.dtsi"

		/ {
		compatible = "marvell,armada390";

		soc {
		internal-regs {
		pinctrl@18000 {
		@@ -55,3 +57,4 @@
		};
		};
		};
		};

arch/arm/boot/dts/qcom-apq8064.dtsi

+57 −19

Original line number	Diff line number	Diff line
		@@ -5,6 +5,7 @@
		#include <dt-bindings/reset/qcom,gcc-msm8960.h>
		#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
		#include <dt-bindings/soc/qcom,gsbi.h>
		#include <dt-bindings/interrupt-controller/irq.h>
		#include <dt-bindings/interrupt-controller/arm-gic.h>
		/ {
		model = "Qualcomm APQ8064";
		@@ -354,22 +355,50 @@

		compatible = "qcom,pm8921-gpio";
		reg = <0x150>;
		interrupts = <192 1>, <193 1>, <194 1>,
		<195 1>, <196 1>, <197 1>,
		<198 1>, <199 1>, <200 1>,
		<201 1>, <202 1>, <203 1>,
		<204 1>, <205 1>, <206 1>,
		<207 1>, <208 1>, <209 1>,
		<210 1>, <211 1>, <212 1>,
		<213 1>, <214 1>, <215 1>,
		<216 1>, <217 1>, <218 1>,
		<219 1>, <220 1>, <221 1>,
		<222 1>, <223 1>, <224 1>,
		<225 1>, <226 1>, <227 1>,
		<228 1>, <229 1>, <230 1>,
		<231 1>, <232 1>, <233 1>,
		<234 1>, <235 1>;

		interrupts = <192 IRQ_TYPE_NONE>,
		<193 IRQ_TYPE_NONE>,
		<194 IRQ_TYPE_NONE>,
		<195 IRQ_TYPE_NONE>,
		<196 IRQ_TYPE_NONE>,
		<197 IRQ_TYPE_NONE>,
		<198 IRQ_TYPE_NONE>,
		<199 IRQ_TYPE_NONE>,
		<200 IRQ_TYPE_NONE>,
		<201 IRQ_TYPE_NONE>,
		<202 IRQ_TYPE_NONE>,
		<203 IRQ_TYPE_NONE>,
		<204 IRQ_TYPE_NONE>,
		<205 IRQ_TYPE_NONE>,
		<206 IRQ_TYPE_NONE>,
		<207 IRQ_TYPE_NONE>,
		<208 IRQ_TYPE_NONE>,
		<209 IRQ_TYPE_NONE>,
		<210 IRQ_TYPE_NONE>,
		<211 IRQ_TYPE_NONE>,
		<212 IRQ_TYPE_NONE>,
		<213 IRQ_TYPE_NONE>,
		<214 IRQ_TYPE_NONE>,
		<215 IRQ_TYPE_NONE>,
		<216 IRQ_TYPE_NONE>,
		<217 IRQ_TYPE_NONE>,
		<218 IRQ_TYPE_NONE>,
		<219 IRQ_TYPE_NONE>,
		<220 IRQ_TYPE_NONE>,
		<221 IRQ_TYPE_NONE>,
		<222 IRQ_TYPE_NONE>,
		<223 IRQ_TYPE_NONE>,
		<224 IRQ_TYPE_NONE>,
		<225 IRQ_TYPE_NONE>,
		<226 IRQ_TYPE_NONE>,
		<227 IRQ_TYPE_NONE>,
		<228 IRQ_TYPE_NONE>,
		<229 IRQ_TYPE_NONE>,
		<230 IRQ_TYPE_NONE>,
		<231 IRQ_TYPE_NONE>,
		<232 IRQ_TYPE_NONE>,
		<233 IRQ_TYPE_NONE>,
		<234 IRQ_TYPE_NONE>,
		<235 IRQ_TYPE_NONE>;
		gpio-controller;
		#gpio-cells = <2>;

		@@ -381,9 +410,18 @@
		gpio-controller;
		#gpio-cells = <2>;
		interrupts =
		<128 1>, <129 1>, <130 1>, <131 1>,
		<132 1>, <133 1>, <134 1>, <135 1>,
		<136 1>, <137 1>, <138 1>, <139 1>;
		<128 IRQ_TYPE_NONE>,
		<129 IRQ_TYPE_NONE>,
		<130 IRQ_TYPE_NONE>,
		<131 IRQ_TYPE_NONE>,
		<132 IRQ_TYPE_NONE>,
		<133 IRQ_TYPE_NONE>,
		<134 IRQ_TYPE_NONE>,
		<135 IRQ_TYPE_NONE>,
		<136 IRQ_TYPE_NONE>,
		<137 IRQ_TYPE_NONE>,
		<138 IRQ_TYPE_NONE>,
		<139 IRQ_TYPE_NONE>;
		};

		rtc@11d {

arch/mips/kvm/emulate.c

+53 −10

Original line number	Diff line number	Diff line
		@@ -807,6 +807,47 @@ enum emulation_result kvm_mips_emul_tlbr(struct kvm_vcpu *vcpu)
		return EMULATE_FAIL;
		}

		/**
		* kvm_mips_invalidate_guest_tlb() - Indicates a change in guest MMU map.
		* @vcpu: VCPU with changed mappings.
		* @tlb: TLB entry being removed.
		*
		* This is called to indicate a single change in guest MMU mappings, so that we
		* can arrange TLB flushes on this and other CPUs.
		*/
		static void kvm_mips_invalidate_guest_tlb(struct kvm_vcpu *vcpu,
		struct kvm_mips_tlb *tlb)
		{
		int cpu, i;
		bool user;

		/* No need to flush for entries which are already invalid */
		if (!((tlb->tlb_lo[0] \| tlb->tlb_lo[1]) & ENTRYLO_V))
		return;
		/* User address space doesn't need flushing for KSeg2/3 changes */
		user = tlb->tlb_hi < KVM_GUEST_KSEG0;

		preempt_disable();

		/*
		* Probe the shadow host TLB for the entry being overwritten, if one
		* matches, invalidate it
		*/
		kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);

		/* Invalidate the whole ASID on other CPUs */
		cpu = smp_processor_id();
		for_each_possible_cpu(i) {
		if (i == cpu)
		continue;
		if (user)
		vcpu->arch.guest_user_asid[i] = 0;
		vcpu->arch.guest_kernel_asid[i] = 0;
		}

		preempt_enable();
		}

		/* Write Guest TLB Entry @ Index */
		enum emulation_result kvm_mips_emul_tlbwi(struct kvm_vcpu *vcpu)
		{
		@@ -826,11 +867,8 @@ enum emulation_result kvm_mips_emul_tlbwi(struct kvm_vcpu *vcpu)
		}

		tlb = &vcpu->arch.guest_tlb[index];
		/*
		* Probe the shadow host TLB for the entry being overwritten, if one
		* matches, invalidate it
		*/
		kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);

		kvm_mips_invalidate_guest_tlb(vcpu, tlb);

		tlb->tlb_mask = kvm_read_c0_guest_pagemask(cop0);
		tlb->tlb_hi = kvm_read_c0_guest_entryhi(cop0);
		@@ -859,11 +897,7 @@ enum emulation_result kvm_mips_emul_tlbwr(struct kvm_vcpu *vcpu)

		tlb = &vcpu->arch.guest_tlb[index];

		/*
		* Probe the shadow host TLB for the entry being overwritten, if one
		* matches, invalidate it
		*/
		kvm_mips_host_tlb_inv(vcpu, tlb->tlb_hi);
		kvm_mips_invalidate_guest_tlb(vcpu, tlb);

		tlb->tlb_mask = kvm_read_c0_guest_pagemask(cop0);
		tlb->tlb_hi = kvm_read_c0_guest_entryhi(cop0);
		@@ -982,6 +1016,7 @@ enum emulation_result kvm_mips_emulate_CP0(uint32_t inst, uint32_t *opc,
		int32_t rt, rd, copz, sel, co_bit, op;
		uint32_t pc = vcpu->arch.pc;
		unsigned long curr_pc;
		int cpu, i;

		/*
		* Update PC and hold onto current PC in case there is
		@@ -1089,8 +1124,16 @@ enum emulation_result kvm_mips_emulate_CP0(uint32_t inst, uint32_t *opc,
		vcpu->arch.gprs[rt]
		& ASID_MASK);

		preempt_disable();
		/* Blow away the shadow host TLBs */
		kvm_mips_flush_host_tlb(1);
		cpu = smp_processor_id();
		for_each_possible_cpu(i)
		if (i != cpu) {
		vcpu->arch.guest_user_asid[i] = 0;
		vcpu->arch.guest_kernel_asid[i] = 0;
		}
		preempt_enable();
		}
		kvm_write_c0_guest_entryhi(cop0,
		vcpu->arch.gprs[rt]);

arch/powerpc/include/asm/reg.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -708,6 +708,7 @@
		#define MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */
		#define SPRN_MMCR1 798
		#define SPRN_MMCR2 785
		#define SPRN_UMMCR2 769
		#define SPRN_MMCRA 0x312
		#define MMCRA_SDSYNC 0x80000000UL /* SDAR synced with SIAR */
		#define MMCRA_SDAR_DCACHE_MISS 0x40000000UL