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Commit b8c8fc6a authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'for-usb-next-2013-12-02' of... 

Merge tag 'for-usb-next-2013-12-02' of git://git.kernel.org/pub/scm/linux/kernel/git/sarah/xhci into usb-next

Sarah writes:

xhci: Cleanup for 3.14: Sparse fixes, replace xhci_read/write, misc

Hi Greg,

Here's fifteen patches for 3.14.  They include some non-urgent cleanups,
and the patches to replace the xhci_read/write variants with standard
read/write calls.  As you asked, the big endian fixes are being queued for
3.14 and they aren't marked for stable.

This also includes a couple of streams fixes, but not the full set from
Hans.  (I'll test those later this week.)  The goal is to get both the
xHCI driver streams support and the UAS driver fixed up for 3.14.  We
don't want to mark the fixes for stable, as all the code changes are
really too big for stable.

Please queue for 3.14.

Sarah Sharp
parents 6ce4eac1 7dd09a1a

drivers/usb/host/xhci-dbg.c

+21 −21
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ void xhci_dbg_regs(struct xhci_hcd *xhci) 


	xhci_dbg(xhci, "// xHCI capability registers at %p:\n",

			xhci->cap_regs);

	temp = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);

	temp = readl(&xhci->cap_regs->hc_capbase);

	xhci_dbg(xhci, "// @%p = 0x%x (CAPLENGTH AND HCIVERSION)\n",

			&xhci->cap_regs->hc_capbase, temp);

	xhci_dbg(xhci, "//   CAPLENGTH: 0x%x\n",
@@ -44,13 +44,13 @@ void xhci_dbg_regs(struct xhci_hcd *xhci) 


	xhci_dbg(xhci, "// xHCI operational registers at %p:\n", xhci->op_regs);



	temp = xhci_readl(xhci, &xhci->cap_regs->run_regs_off);

	temp = readl(&xhci->cap_regs->run_regs_off);

	xhci_dbg(xhci, "// @%p = 0x%x RTSOFF\n",

			&xhci->cap_regs->run_regs_off,

			(unsigned int) temp & RTSOFF_MASK);

	xhci_dbg(xhci, "// xHCI runtime registers at %p:\n", xhci->run_regs);



	temp = xhci_readl(xhci, &xhci->cap_regs->db_off);

	temp = readl(&xhci->cap_regs->db_off);

	xhci_dbg(xhci, "// @%p = 0x%x DBOFF\n", &xhci->cap_regs->db_off, temp);

	xhci_dbg(xhci, "// Doorbell array at %p:\n", xhci->dba);

}
@@ -61,7 +61,7 @@ static void xhci_print_cap_regs(struct xhci_hcd *xhci) 


	xhci_dbg(xhci, "xHCI capability registers at %p:\n", xhci->cap_regs);



	temp = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);

	temp = readl(&xhci->cap_regs->hc_capbase);

	xhci_dbg(xhci, "CAPLENGTH AND HCIVERSION 0x%x:\n",

			(unsigned int) temp);

	xhci_dbg(xhci, "CAPLENGTH: 0x%x\n",
@@ -69,7 +69,7 @@ static void xhci_print_cap_regs(struct xhci_hcd *xhci) 
	xhci_dbg(xhci, "HCIVERSION: 0x%x\n",

			(unsigned int) HC_VERSION(temp));



	temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);

	temp = readl(&xhci->cap_regs->hcs_params1);

	xhci_dbg(xhci, "HCSPARAMS 1: 0x%x\n",

			(unsigned int) temp);

	xhci_dbg(xhci, "  Max device slots: %u\n",
@@ -79,7 +79,7 @@ static void xhci_print_cap_regs(struct xhci_hcd *xhci) 
	xhci_dbg(xhci, "  Max ports: %u\n",

			(unsigned int) HCS_MAX_PORTS(temp));



	temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);

	temp = readl(&xhci->cap_regs->hcs_params2);

	xhci_dbg(xhci, "HCSPARAMS 2: 0x%x\n",

			(unsigned int) temp);

	xhci_dbg(xhci, "  Isoc scheduling threshold: %u\n",
@@ -87,7 +87,7 @@ static void xhci_print_cap_regs(struct xhci_hcd *xhci) 
	xhci_dbg(xhci, "  Maximum allowed segments in event ring: %u\n",

			(unsigned int) HCS_ERST_MAX(temp));



	temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);

	temp = readl(&xhci->cap_regs->hcs_params3);

	xhci_dbg(xhci, "HCSPARAMS 3 0x%x:\n",

			(unsigned int) temp);

	xhci_dbg(xhci, "  Worst case U1 device exit latency: %u\n",
@@ -95,14 +95,14 @@ static void xhci_print_cap_regs(struct xhci_hcd *xhci) 
	xhci_dbg(xhci, "  Worst case U2 device exit latency: %u\n",

			(unsigned int) HCS_U2_LATENCY(temp));



	temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);

	temp = readl(&xhci->cap_regs->hcc_params);

	xhci_dbg(xhci, "HCC PARAMS 0x%x:\n", (unsigned int) temp);

	xhci_dbg(xhci, "  HC generates %s bit addresses\n",

			HCC_64BIT_ADDR(temp) ? "64" : "32");

	/* FIXME */

	xhci_dbg(xhci, "  FIXME: more HCCPARAMS debugging\n");



	temp = xhci_readl(xhci, &xhci->cap_regs->run_regs_off);

	temp = readl(&xhci->cap_regs->run_regs_off);

	xhci_dbg(xhci, "RTSOFF 0x%x:\n", temp & RTSOFF_MASK);

}
@@ -110,7 +110,7 @@ static void xhci_print_command_reg(struct xhci_hcd *xhci) 
{

	u32 temp;



	temp = xhci_readl(xhci, &xhci->op_regs->command);

	temp = readl(&xhci->op_regs->command);

	xhci_dbg(xhci, "USBCMD 0x%x:\n", temp);

	xhci_dbg(xhci, "  HC is %s\n",

			(temp & CMD_RUN) ? "running" : "being stopped");
@@ -128,7 +128,7 @@ static void xhci_print_status(struct xhci_hcd *xhci) 
{

	u32 temp;



	temp = xhci_readl(xhci, &xhci->op_regs->status);

	temp = readl(&xhci->op_regs->status);

	xhci_dbg(xhci, "USBSTS 0x%x:\n", temp);

	xhci_dbg(xhci, "  Event ring is %sempty\n",

			(temp & STS_EINT) ? "not " : "");
@@ -163,7 +163,7 @@ static void xhci_print_ports(struct xhci_hcd *xhci) 
		for (j = 0; j < NUM_PORT_REGS; ++j) {

			xhci_dbg(xhci, "%p port %s reg = 0x%x\n",

					addr, names[j],

					(unsigned int) xhci_readl(xhci, addr));

					(unsigned int) readl(addr));

			addr++;

		}

	}
@@ -177,7 +177,7 @@ void xhci_print_ir_set(struct xhci_hcd *xhci, int set_num) 
	u64 temp_64;



	addr = &ir_set->irq_pending;

	temp = xhci_readl(xhci, addr);

	temp = readl(addr);

	if (temp == XHCI_INIT_VALUE)

		return;
@@ -187,28 +187,28 @@ void xhci_print_ir_set(struct xhci_hcd *xhci, int set_num) 
			(unsigned int)temp);



	addr = &ir_set->irq_control;

	temp = xhci_readl(xhci, addr);

	temp = readl(addr);

	xhci_dbg(xhci, "  %p: ir_set.control = 0x%x\n", addr,

			(unsigned int)temp);



	addr = &ir_set->erst_size;

	temp = xhci_readl(xhci, addr);

	temp = readl(addr);

	xhci_dbg(xhci, "  %p: ir_set.erst_size = 0x%x\n", addr,

			(unsigned int)temp);



	addr = &ir_set->rsvd;

	temp = xhci_readl(xhci, addr);

	temp = readl(addr);

	if (temp != XHCI_INIT_VALUE)

		xhci_dbg(xhci, "  WARN: %p: ir_set.rsvd = 0x%x\n",

				addr, (unsigned int)temp);



	addr = &ir_set->erst_base;

	temp_64 = xhci_read_64(xhci, addr);

	temp_64 = readq(addr);

	xhci_dbg(xhci, "  %p: ir_set.erst_base = @%08llx\n",

			addr, temp_64);



	addr = &ir_set->erst_dequeue;

	temp_64 = xhci_read_64(xhci, addr);

	temp_64 = readq(addr);

	xhci_dbg(xhci, "  %p: ir_set.erst_dequeue = @%08llx\n",

			addr, temp_64);

}
@@ -219,12 +219,12 @@ void xhci_print_run_regs(struct xhci_hcd *xhci) 
	int i;



	xhci_dbg(xhci, "xHCI runtime registers at %p:\n", xhci->run_regs);

	temp = xhci_readl(xhci, &xhci->run_regs->microframe_index);

	temp = readl(&xhci->run_regs->microframe_index);

	xhci_dbg(xhci, "  %p: Microframe index = 0x%x\n",

			&xhci->run_regs->microframe_index,

			(unsigned int) temp);

	for (i = 0; i < 7; ++i) {

		temp = xhci_readl(xhci, &xhci->run_regs->rsvd[i]);

		temp = readl(&xhci->run_regs->rsvd[i]);

		if (temp != XHCI_INIT_VALUE)

			xhci_dbg(xhci, "  WARN: %p: Rsvd[%i] = 0x%x\n",

					&xhci->run_regs->rsvd[i],
@@ -412,7 +412,7 @@ void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci) 
{

	u64 val;



	val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);

	val = readq(&xhci->op_regs->cmd_ring);

	xhci_dbg(xhci, "// xHC command ring deq ptr low bits + flags = @%08x\n",

			lower_32_bits(val));

	xhci_dbg(xhci, "// xHC command ring deq ptr high bits = @%08x\n",

drivers/usb/host/xhci-hub.c

+51 −55
Original line number Diff line number Diff line
@@ -94,7 +94,7 @@ static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci, 
	 */

	memset(port_removable, 0, sizeof(port_removable));

	for (i = 0; i < ports; i++) {

		portsc = xhci_readl(xhci, xhci->usb2_ports[i]);

		portsc = readl(xhci->usb2_ports[i]);

		/* If a device is removable, PORTSC reports a 0, same as in the

		 * hub descriptor DeviceRemovable bits.

		 */
@@ -148,7 +148,7 @@ static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci, 
	port_removable = 0;

	/* bit 0 is reserved, bit 1 is for port 1, etc. */

	for (i = 0; i < ports; i++) {

		portsc = xhci_readl(xhci, xhci->usb3_ports[i]);

		portsc = readl(xhci->usb3_ports[i]);

		if (portsc & PORT_DEV_REMOVE)

			port_removable |= 1 << (i + 1);

	}
@@ -342,8 +342,8 @@ static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci, 
	}



	/* Write 1 to disable the port */

	xhci_writel(xhci, port_status | PORT_PE, addr);

	port_status = xhci_readl(xhci, addr);

	writel(port_status | PORT_PE, addr);

	port_status = readl(addr);

	xhci_dbg(xhci, "disable port, actual port %d status  = 0x%x\n",

			wIndex, port_status);

}
@@ -388,8 +388,8 @@ static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue, 
		return;

	}

	/* Change bits are all write 1 to clear */

	xhci_writel(xhci, port_status | status, addr);

	port_status = xhci_readl(xhci, addr);

	writel(port_status | status, addr);

	port_status = readl(addr);

	xhci_dbg(xhci, "clear port %s change, actual port %d status  = 0x%x\n",

			port_change_bit, wIndex, port_status);

}
@@ -415,11 +415,11 @@ void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array, 
{

	u32 temp;



	temp = xhci_readl(xhci, port_array[port_id]);

	temp = readl(port_array[port_id]);

	temp = xhci_port_state_to_neutral(temp);

	temp &= ~PORT_PLS_MASK;

	temp |= PORT_LINK_STROBE | link_state;

	xhci_writel(xhci, temp, port_array[port_id]);

	writel(temp, port_array[port_id]);

}



static void xhci_set_remote_wake_mask(struct xhci_hcd *xhci,
@@ -427,7 +427,7 @@ static void xhci_set_remote_wake_mask(struct xhci_hcd *xhci, 
{

	u32 temp;



	temp = xhci_readl(xhci, port_array[port_id]);

	temp = readl(port_array[port_id]);

	temp = xhci_port_state_to_neutral(temp);



	if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_CONNECT)
@@ -445,7 +445,7 @@ static void xhci_set_remote_wake_mask(struct xhci_hcd *xhci, 
	else

		temp &= ~PORT_WKOC_E;



	xhci_writel(xhci, temp, port_array[port_id]);

	writel(temp, port_array[port_id]);

}



/* Test and clear port RWC bit */
@@ -454,11 +454,11 @@ void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array, 
{

	u32 temp;



	temp = xhci_readl(xhci, port_array[port_id]);

	temp = readl(port_array[port_id]);

	if (temp & port_bit) {

		temp = xhci_port_state_to_neutral(temp);

		temp |= port_bit;

		xhci_writel(xhci, temp, port_array[port_id]);

		writel(temp, port_array[port_id]);

	}

}
@@ -623,8 +623,7 @@ static u32 xhci_get_port_status(struct usb_hcd *hcd, 
				}

				xhci_ring_device(xhci, slot_id);

			} else {

				int port_status = xhci_readl(xhci,

						port_array[wIndex]);

				int port_status = readl(port_array[wIndex]);

				xhci_warn(xhci, "Port resume took longer than %i msec, port status = 0x%x\n",

						XHCI_MAX_REXIT_TIMEOUT,

						port_status);
@@ -733,12 +732,12 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
		/* Set the U1 and U2 exit latencies. */

		memcpy(buf, &usb_bos_descriptor,

				USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE);

		temp = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);

		temp = readl(&xhci->cap_regs->hcs_params3);

		buf[12] = HCS_U1_LATENCY(temp);

		put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]);



		/* Indicate whether the host has LTM support. */

		temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);

		temp = readl(&xhci->cap_regs->hcc_params);

		if (HCC_LTC(temp))

			buf[8] |= USB_LTM_SUPPORT;
@@ -748,7 +747,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
		if (!wIndex || wIndex > max_ports)

			goto error;

		wIndex--;

		temp = xhci_readl(xhci, port_array[wIndex]);

		temp = readl(port_array[wIndex]);

		if (temp == 0xffffffff) {

			retval = -ENODEV;

			break;
@@ -775,7 +774,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
		if (!wIndex || wIndex > max_ports)

			goto error;

		wIndex--;

		temp = xhci_readl(xhci, port_array[wIndex]);

		temp = readl(port_array[wIndex]);

		if (temp == 0xffffffff) {

			retval = -ENODEV;

			break;
@@ -784,7 +783,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
		/* FIXME: What new port features do we need to support? */

		switch (wValue) {

		case USB_PORT_FEAT_SUSPEND:

			temp = xhci_readl(xhci, port_array[wIndex]);

			temp = readl(port_array[wIndex]);

			if ((temp & PORT_PLS_MASK) != XDEV_U0) {

				/* Resume the port to U0 first */

				xhci_set_link_state(xhci, port_array, wIndex,
@@ -797,7 +796,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
			 * a port unless the port reports that it is in the

			 * enabled (PED = ‘1’,PLS < ‘3’) state.

			 */

			temp = xhci_readl(xhci, port_array[wIndex]);

			temp = readl(port_array[wIndex]);

			if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)

				|| (temp & PORT_PLS_MASK) >= XDEV_U3) {

				xhci_warn(xhci, "USB core suspending device "
@@ -822,11 +821,11 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
			msleep(10); /* wait device to enter */

			spin_lock_irqsave(&xhci->lock, flags);



			temp = xhci_readl(xhci, port_array[wIndex]);

			temp = readl(port_array[wIndex]);

			bus_state->suspended_ports |= 1 << wIndex;

			break;

		case USB_PORT_FEAT_LINK_STATE:

			temp = xhci_readl(xhci, port_array[wIndex]);

			temp = readl(port_array[wIndex]);



			/* Disable port */

			if (link_state == USB_SS_PORT_LS_SS_DISABLED) {
@@ -839,9 +838,8 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
				temp |= PORT_CSC | PORT_PEC | PORT_WRC |

					PORT_OCC | PORT_RC | PORT_PLC |

					PORT_CEC;

				xhci_writel(xhci, temp | PORT_PE,

					port_array[wIndex]);

				temp = xhci_readl(xhci, port_array[wIndex]);

				writel(temp | PORT_PE, port_array[wIndex]);

				temp = readl(port_array[wIndex]);

				break;

			}
@@ -850,7 +848,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
				xhci_dbg(xhci, "Enable port %d\n", wIndex);

				xhci_set_link_state(xhci, port_array, wIndex,

						link_state);

				temp = xhci_readl(xhci, port_array[wIndex]);

				temp = readl(port_array[wIndex]);

				break;

			}
@@ -884,7 +882,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
			msleep(20); /* wait device to enter */

			spin_lock_irqsave(&xhci->lock, flags);



			temp = xhci_readl(xhci, port_array[wIndex]);

			temp = readl(port_array[wIndex]);

			if (link_state == USB_SS_PORT_LS_U3)

				bus_state->suspended_ports |= 1 << wIndex;

			break;
@@ -895,10 +893,9 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
			 * However, khubd will ignore the roothub events until

			 * the roothub is registered.

			 */

			xhci_writel(xhci, temp | PORT_POWER,

					port_array[wIndex]);

			writel(temp | PORT_POWER, port_array[wIndex]);



			temp = xhci_readl(xhci, port_array[wIndex]);

			temp = readl(port_array[wIndex]);

			xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x\n", wIndex, temp);



			spin_unlock_irqrestore(&xhci->lock, flags);
@@ -911,52 +908,52 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
			break;

		case USB_PORT_FEAT_RESET:

			temp = (temp | PORT_RESET);

			xhci_writel(xhci, temp, port_array[wIndex]);

			writel(temp, port_array[wIndex]);



			temp = xhci_readl(xhci, port_array[wIndex]);

			temp = readl(port_array[wIndex]);

			xhci_dbg(xhci, "set port reset, actual port %d status  = 0x%x\n", wIndex, temp);

			break;

		case USB_PORT_FEAT_REMOTE_WAKE_MASK:

			xhci_set_remote_wake_mask(xhci, port_array,

					wIndex, wake_mask);

			temp = xhci_readl(xhci, port_array[wIndex]);

			temp = readl(port_array[wIndex]);

			xhci_dbg(xhci, "set port remote wake mask, "

					"actual port %d status  = 0x%x\n",

					wIndex, temp);

			break;

		case USB_PORT_FEAT_BH_PORT_RESET:

			temp |= PORT_WR;

			xhci_writel(xhci, temp, port_array[wIndex]);

			writel(temp, port_array[wIndex]);



			temp = xhci_readl(xhci, port_array[wIndex]);

			temp = readl(port_array[wIndex]);

			break;

		case USB_PORT_FEAT_U1_TIMEOUT:

			if (hcd->speed != HCD_USB3)

				goto error;

			temp = xhci_readl(xhci, port_array[wIndex] + PORTPMSC);

			temp = readl(port_array[wIndex] + PORTPMSC);

			temp &= ~PORT_U1_TIMEOUT_MASK;

			temp |= PORT_U1_TIMEOUT(timeout);

			xhci_writel(xhci, temp, port_array[wIndex] + PORTPMSC);

			writel(temp, port_array[wIndex] + PORTPMSC);

			break;

		case USB_PORT_FEAT_U2_TIMEOUT:

			if (hcd->speed != HCD_USB3)

				goto error;

			temp = xhci_readl(xhci, port_array[wIndex] + PORTPMSC);

			temp = readl(port_array[wIndex] + PORTPMSC);

			temp &= ~PORT_U2_TIMEOUT_MASK;

			temp |= PORT_U2_TIMEOUT(timeout);

			xhci_writel(xhci, temp, port_array[wIndex] + PORTPMSC);

			writel(temp, port_array[wIndex] + PORTPMSC);

			break;

		default:

			goto error;

		}

		/* unblock any posted writes */

		temp = xhci_readl(xhci, port_array[wIndex]);

		temp = readl(port_array[wIndex]);

		break;

	case ClearPortFeature:

		if (!wIndex || wIndex > max_ports)

			goto error;

		wIndex--;

		temp = xhci_readl(xhci, port_array[wIndex]);

		temp = readl(port_array[wIndex]);

		if (temp == 0xffffffff) {

			retval = -ENODEV;

			break;
@@ -965,7 +962,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
		temp = xhci_port_state_to_neutral(temp);

		switch (wValue) {

		case USB_PORT_FEAT_SUSPEND:

			temp = xhci_readl(xhci, port_array[wIndex]);

			temp = readl(port_array[wIndex]);

			xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");

			xhci_dbg(xhci, "PORTSC %04x\n", temp);

			if (temp & PORT_RESET)
@@ -1008,8 +1005,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 
					port_array[wIndex], temp);

			break;

		case USB_PORT_FEAT_POWER:

			xhci_writel(xhci, temp & ~PORT_POWER,

				port_array[wIndex]);

			writel(temp & ~PORT_POWER, port_array[wIndex]);



			spin_unlock_irqrestore(&xhci->lock, flags);

			temp = usb_acpi_power_manageable(hcd->self.root_hub,
@@ -1070,7 +1066,7 @@ int xhci_hub_status_data(struct usb_hcd *hcd, char *buf) 
	spin_lock_irqsave(&xhci->lock, flags);

	/* For each port, did anything change?  If so, set that bit in buf. */

	for (i = 0; i < max_ports; i++) {

		temp = xhci_readl(xhci, port_array[i]);

		temp = readl(port_array[i]);

		if (temp == 0xffffffff) {

			retval = -ENODEV;

			break;
@@ -1124,7 +1120,7 @@ int xhci_bus_suspend(struct usb_hcd *hcd) 
		u32 t1, t2;

		int slot_id;



		t1 = xhci_readl(xhci, port_array[port_index]);

		t1 = readl(port_array[port_index]);

		t2 = xhci_port_state_to_neutral(t1);



		if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
@@ -1157,7 +1153,7 @@ int xhci_bus_suspend(struct usb_hcd *hcd) 


		t1 = xhci_port_state_to_neutral(t1);

		if (t1 != t2)

			xhci_writel(xhci, t2, port_array[port_index]);

			writel(t2, port_array[port_index]);

	}

	hcd->state = HC_STATE_SUSPENDED;

	bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
@@ -1187,9 +1183,9 @@ int xhci_bus_resume(struct usb_hcd *hcd) 
	}



	/* delay the irqs */

	temp = xhci_readl(xhci, &xhci->op_regs->command);

	temp = readl(&xhci->op_regs->command);

	temp &= ~CMD_EIE;

	xhci_writel(xhci, temp, &xhci->op_regs->command);

	writel(temp, &xhci->op_regs->command);



	port_index = max_ports;

	while (port_index--) {
@@ -1198,7 +1194,7 @@ int xhci_bus_resume(struct usb_hcd *hcd) 
		u32 temp;

		int slot_id;



		temp = xhci_readl(xhci, port_array[port_index]);

		temp = readl(port_array[port_index]);

		if (DEV_SUPERSPEED(temp))

			temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);

		else
@@ -1235,17 +1231,17 @@ int xhci_bus_resume(struct usb_hcd *hcd) 
			if (slot_id)

				xhci_ring_device(xhci, slot_id);

		} else

			xhci_writel(xhci, temp, port_array[port_index]);

			writel(temp, port_array[port_index]);

	}



	(void) xhci_readl(xhci, &xhci->op_regs->command);

	(void) readl(&xhci->op_regs->command);



	bus_state->next_statechange = jiffies + msecs_to_jiffies(5);

	/* re-enable irqs */

	temp = xhci_readl(xhci, &xhci->op_regs->command);

	temp = readl(&xhci->op_regs->command);

	temp |= CMD_EIE;

	xhci_writel(xhci, temp, &xhci->op_regs->command);

	temp = xhci_readl(xhci, &xhci->op_regs->command);

	writel(temp, &xhci->op_regs->command);

	temp = readl(&xhci->op_regs->command);



	spin_unlock_irqrestore(&xhci->lock, flags);

	return 0;

drivers/usb/host/xhci-mem.c

+34 −34
Original line number Diff line number Diff line
@@ -57,7 +57,7 @@ static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, 
	/* If the cycle state is 0, set the cycle bit to 1 for all the TRBs */

	if (cycle_state == 0) {

		for (i = 0; i < TRBS_PER_SEGMENT; i++)

			seg->trbs[i].link.control |= TRB_CYCLE;

			seg->trbs[i].link.control |= cpu_to_le32(TRB_CYCLE);

	}

	seg->dma = dma;

	seg->next = NULL;
@@ -308,7 +308,8 @@ static void xhci_reinit_cached_ring(struct xhci_hcd *xhci, 
				sizeof(union xhci_trb)*TRBS_PER_SEGMENT);

		if (cycle_state == 0) {

			for (i = 0; i < TRBS_PER_SEGMENT; i++)

				seg->trbs[i].link.control |= TRB_CYCLE;

				seg->trbs[i].link.control |=

					cpu_to_le32(TRB_CYCLE);

		}

		/* All endpoint rings have link TRBs */

		xhci_link_segments(xhci, seg, seg->next, type);
@@ -432,10 +433,10 @@ static void xhci_free_stream_ctx(struct xhci_hcd *xhci, 
		unsigned int num_stream_ctxs,

		struct xhci_stream_ctx *stream_ctx, dma_addr_t dma)

{

	struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);

	struct device *dev = xhci_to_hcd(xhci)->self.controller;



	if (num_stream_ctxs > MEDIUM_STREAM_ARRAY_SIZE)

		dma_free_coherent(&pdev->dev,

		dma_free_coherent(dev,

				sizeof(struct xhci_stream_ctx)*num_stream_ctxs,

				stream_ctx, dma);

	else if (num_stream_ctxs <= SMALL_STREAM_ARRAY_SIZE)
@@ -460,10 +461,10 @@ static struct xhci_stream_ctx *xhci_alloc_stream_ctx(struct xhci_hcd *xhci, 
		unsigned int num_stream_ctxs, dma_addr_t *dma,

		gfp_t mem_flags)

{

	struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);

	struct device *dev = xhci_to_hcd(xhci)->self.controller;



	if (num_stream_ctxs > MEDIUM_STREAM_ARRAY_SIZE)

		return dma_alloc_coherent(&pdev->dev,

		return dma_alloc_coherent(dev,

				sizeof(struct xhci_stream_ctx)*num_stream_ctxs,

				dma, mem_flags);

	else if (num_stream_ctxs <= SMALL_STREAM_ARRAY_SIZE)
@@ -721,7 +722,6 @@ void xhci_free_stream_info(struct xhci_hcd *xhci, 
				stream_info->stream_ctx_array,

				stream_info->ctx_array_dma);



	if (stream_info)

	kfree(stream_info->stream_rings);

	kfree(stream_info);

}
@@ -1616,7 +1616,7 @@ static void scratchpad_free(struct xhci_hcd *xhci) 
{

	int num_sp;

	int i;

	struct pci_dev	*pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);

	struct device *dev = xhci_to_hcd(xhci)->self.controller;



	if (!xhci->scratchpad)

		return;
@@ -1624,13 +1624,13 @@ static void scratchpad_free(struct xhci_hcd *xhci) 
	num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);



	for (i = 0; i < num_sp; i++) {

		dma_free_coherent(&pdev->dev, xhci->page_size,

		dma_free_coherent(dev, xhci->page_size,

				    xhci->scratchpad->sp_buffers[i],

				    xhci->scratchpad->sp_dma_buffers[i]);

	}

	kfree(xhci->scratchpad->sp_dma_buffers);

	kfree(xhci->scratchpad->sp_buffers);

	dma_free_coherent(&pdev->dev, num_sp * sizeof(u64),

	dma_free_coherent(dev, num_sp * sizeof(u64),

			    xhci->scratchpad->sp_array,

			    xhci->scratchpad->sp_dma);

	kfree(xhci->scratchpad);
@@ -1692,7 +1692,7 @@ void xhci_free_command(struct xhci_hcd *xhci, 


void xhci_mem_cleanup(struct xhci_hcd *xhci)

{

	struct pci_dev	*pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);

	struct device	*dev = xhci_to_hcd(xhci)->self.controller;

	struct xhci_cd  *cur_cd, *next_cd;

	int size;

	int i, j, num_ports;
@@ -1700,7 +1700,7 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci) 
	/* Free the Event Ring Segment Table and the actual Event Ring */

	size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);

	if (xhci->erst.entries)

		dma_free_coherent(&pdev->dev, size,

		dma_free_coherent(dev, size,

				xhci->erst.entries, xhci->erst.erst_dma_addr);

	xhci->erst.entries = NULL;

	xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed ERST");
@@ -1748,7 +1748,7 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci) 
			"Freed medium stream array pool");



	if (xhci->dcbaa)

		dma_free_coherent(&pdev->dev, sizeof(*xhci->dcbaa),

		dma_free_coherent(dev, sizeof(*xhci->dcbaa),

				xhci->dcbaa, xhci->dcbaa->dma);

	xhci->dcbaa = NULL;
@@ -1958,7 +1958,7 @@ static void xhci_set_hc_event_deq(struct xhci_hcd *xhci) 
		xhci_warn(xhci, "WARN something wrong with SW event ring "

				"dequeue ptr.\n");

	/* Update HC event ring dequeue pointer */

	temp = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);

	temp = readq(&xhci->ir_set->erst_dequeue);

	temp &= ERST_PTR_MASK;

	/* Don't clear the EHB bit (which is RW1C) because

	 * there might be more events to service.
@@ -1967,7 +1967,7 @@ static void xhci_set_hc_event_deq(struct xhci_hcd *xhci) 
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// Write event ring dequeue pointer, "

			"preserving EHB bit");

	xhci_write_64(xhci, ((u64) deq & (u64) ~ERST_PTR_MASK) | temp,

	writeq(((u64) deq & (u64) ~ERST_PTR_MASK) | temp,

			&xhci->ir_set->erst_dequeue);

}
@@ -1986,7 +1986,7 @@ static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports, 
	}



	/* Port offset and count in the third dword, see section 7.2 */

	temp = xhci_readl(xhci, addr + 2);

	temp = readl(addr + 2);

	port_offset = XHCI_EXT_PORT_OFF(temp);

	port_count = XHCI_EXT_PORT_COUNT(temp);

	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
@@ -2069,7 +2069,7 @@ static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags) 
	int cap_count = 0;



	addr = &xhci->cap_regs->hcc_params;

	offset = XHCI_HCC_EXT_CAPS(xhci_readl(xhci, addr));

	offset = XHCI_HCC_EXT_CAPS(readl(addr));

	if (offset == 0) {

		xhci_err(xhci, "No Extended Capability registers, "

				"unable to set up roothub.\n");
@@ -2106,7 +2106,7 @@ static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags) 
	/* count extended protocol capability entries for later caching */

	do {

		u32 cap_id;

		cap_id = xhci_readl(xhci, tmp_addr);

		cap_id = readl(tmp_addr);

		if (XHCI_EXT_CAPS_ID(cap_id) == XHCI_EXT_CAPS_PROTOCOL)

			cap_count++;

		tmp_offset = XHCI_EXT_CAPS_NEXT(cap_id);
@@ -2120,7 +2120,7 @@ static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags) 
	while (1) {

		u32 cap_id;



		cap_id = xhci_readl(xhci, addr);

		cap_id = readl(addr);

		if (XHCI_EXT_CAPS_ID(cap_id) == XHCI_EXT_CAPS_PROTOCOL)

			xhci_add_in_port(xhci, num_ports, addr,

					(u8) XHCI_EXT_PORT_MAJOR(cap_id),
@@ -2224,7 +2224,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 


	INIT_LIST_HEAD(&xhci->cancel_cmd_list);



	page_size = xhci_readl(xhci, &xhci->op_regs->page_size);

	page_size = readl(&xhci->op_regs->page_size);

	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"Supported page size register = 0x%x", page_size);

	for (i = 0; i < 16; i++) {
@@ -2247,14 +2247,14 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 
	 * Program the Number of Device Slots Enabled field in the CONFIG

	 * register with the max value of slots the HC can handle.

	 */

	val = HCS_MAX_SLOTS(xhci_readl(xhci, &xhci->cap_regs->hcs_params1));

	val = HCS_MAX_SLOTS(readl(&xhci->cap_regs->hcs_params1));

	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// xHC can handle at most %d device slots.", val);

	val2 = xhci_readl(xhci, &xhci->op_regs->config_reg);

	val2 = readl(&xhci->op_regs->config_reg);

	val |= (val2 & ~HCS_SLOTS_MASK);

	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// Setting Max device slots reg = 0x%x.", val);

	xhci_writel(xhci, val, &xhci->op_regs->config_reg);

	writel(val, &xhci->op_regs->config_reg);



	/*

	 * Section 5.4.8 - doorbell array must be
@@ -2269,7 +2269,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// Device context base array address = 0x%llx (DMA), %p (virt)",

			(unsigned long long)xhci->dcbaa->dma, xhci->dcbaa);

	xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr);

	writeq(dma, &xhci->op_regs->dcbaa_ptr);



	/*

	 * Initialize the ring segment pool.  The ring must be a contiguous
@@ -2312,13 +2312,13 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 
			(unsigned long long)xhci->cmd_ring->first_seg->dma);



	/* Set the address in the Command Ring Control register */

	val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);

	val_64 = readq(&xhci->op_regs->cmd_ring);

	val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |

		(xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) |

		xhci->cmd_ring->cycle_state;

	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// Setting command ring address to 0x%x", val);

	xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);

	writeq(val_64, &xhci->op_regs->cmd_ring);

	xhci_dbg_cmd_ptrs(xhci);



	xhci->lpm_command = xhci_alloc_command(xhci, true, true, flags);
@@ -2331,7 +2331,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 
	 */

	xhci->cmd_ring_reserved_trbs++;



	val = xhci_readl(xhci, &xhci->cap_regs->db_off);

	val = readl(&xhci->cap_regs->db_off);

	val &= DBOFF_MASK;

	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// Doorbell array is located at offset 0x%x"
@@ -2382,13 +2382,13 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 
	}



	/* set ERST count with the number of entries in the segment table */

	val = xhci_readl(xhci, &xhci->ir_set->erst_size);

	val = readl(&xhci->ir_set->erst_size);

	val &= ERST_SIZE_MASK;

	val |= ERST_NUM_SEGS;

	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// Write ERST size = %i to ir_set 0 (some bits preserved)",

			val);

	xhci_writel(xhci, val, &xhci->ir_set->erst_size);

	writel(val, &xhci->ir_set->erst_size);



	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// Set ERST entries to point to event ring.");
@@ -2396,10 +2396,10 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// Set ERST base address for ir_set 0 = 0x%llx",

			(unsigned long long)xhci->erst.erst_dma_addr);

	val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base);

	val_64 = readq(&xhci->ir_set->erst_base);

	val_64 &= ERST_PTR_MASK;

	val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK);

	xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base);

	writeq(val_64, &xhci->ir_set->erst_base);



	/* Set the event ring dequeue address */

	xhci_set_hc_event_deq(xhci);
@@ -2431,10 +2431,10 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 
	 * is necessary for allowing USB 3.0 devices to do remote wakeup from

	 * U3 (device suspend).

	 */

	temp = xhci_readl(xhci, &xhci->op_regs->dev_notification);

	temp = readl(&xhci->op_regs->dev_notification);

	temp &= ~DEV_NOTE_MASK;

	temp |= DEV_NOTE_FWAKE;

	xhci_writel(xhci, temp, &xhci->op_regs->dev_notification);

	writel(temp, &xhci->op_regs->dev_notification);



	return 0;

drivers/usb/host/xhci-ring.c

+17 −19

File changed.

Preview size limit exceeded, changes collapsed.

drivers/usb/host/xhci-trace.h

+3 −3
Original line number Diff line number Diff line
@@ -116,12 +116,12 @@ DECLARE_EVENT_CLASS(xhci_log_event, 
		__field(u64, dma)

		__field(u32, status)

		__field(u32, flags)

		__dynamic_array(__le32, trb, 4)

		__dynamic_array(u8, trb, sizeof(struct xhci_generic_trb))

	),

	TP_fast_assign(

		__entry->va = trb_va;

		__entry->dma = le64_to_cpu(((u64)ev->field[1]) << 32 |

						ev->field[0]);

		__entry->dma = ((u64)le32_to_cpu(ev->field[1])) << 32 |

					le32_to_cpu(ev->field[0]);

		__entry->status = le32_to_cpu(ev->field[2]);

		__entry->flags = le32_to_cpu(ev->field[3]);

		memcpy(__get_dynamic_array(trb), trb_va,