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Commit b858dc40 authored by Taniya Das's avatar Taniya Das
Browse files

clk: qcom: mmcc: Update the DSI PLL parent names 



The byte and pixel clocks RCG sources from their dsi byte/pixel PLLs,
update the parent names so that those parents could be requested.

Change-Id: Ie92df31a5cdfa176e872d721a84475a37172a2dd
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 2d28ff09

drivers/clk/qcom/mmcc-msmfalcon.c

+4 −4
Original line number Diff line number Diff line
@@ -112,8 +112,8 @@ static const struct parent_map mmcc_parent_map_1[] = { 


static const char * const mmcc_parent_names_1[] = {

	"xo",

	"dsi0_phy_pll_out_byteclk",

	"dsi1_phy_pll_out_byteclk",

	"dsi0pll_byte_clk_mux",

	"dsi1pll_byte_clk_mux",

	"core_bi_pll_test_se",

};
@@ -240,8 +240,8 @@ static const struct parent_map mmcc_parent_map_8[] = { 


static const char * const mmcc_parent_names_8[] = {

	"xo",

	"dsi0_phy_pll_out_dsiclk",

	"dsi1_phy_pll_out_dsiclk",

	"dsi0pll_pixel_clk_mux",

	"dsi1pll_pixel_clk_mux",

	"core_bi_pll_test_se",

};