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Commit b4b664be authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARM fixes from Russell King:
 "A number of low impact fixes, the most noticable one is the thumb2
  frame pointer fix.  We also fix a regression caused during this merge
  window with ARM925 CPUs running with caches disabled, and fix a number
  of warnings"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: arm925: ensure assembly sets up writethrough mapping
  ARM: perf: fix compiler warning with gcc 4.6.4 (and tidy code)
  ARM: l2c: fix dependencies on PL310 errata symbols
  ARM: 8069/1: Make thread_save_fp macro aware of THUMB2 mode
  ARM: 8068/1: scoop: Remove unused variable
parents 8b8f5d97 b8d8772e
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+0 −1
Original line number Diff line number Diff line
@@ -182,7 +182,6 @@ static int scoop_probe(struct platform_device *pdev)
	struct scoop_config *inf;
	struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	int ret;
	int temp;

	if (!mem)
		return -EINVAL;
+6 −0
Original line number Diff line number Diff line
@@ -114,8 +114,14 @@ static inline struct thread_info *current_thread_info(void)
	((unsigned long)(task_thread_info(tsk)->cpu_context.pc))
#define thread_saved_sp(tsk)	\
	((unsigned long)(task_thread_info(tsk)->cpu_context.sp))

#ifndef CONFIG_THUMB2_KERNEL
#define thread_saved_fp(tsk)	\
	((unsigned long)(task_thread_info(tsk)->cpu_context.fp))
#else
#define thread_saved_fp(tsk)	\
	((unsigned long)(task_thread_info(tsk)->cpu_context.r7))
#endif

extern void crunch_task_disable(struct thread_info *);
extern void crunch_task_copy(struct thread_info *, void *);
+2 −2
Original line number Diff line number Diff line
@@ -1924,7 +1924,7 @@ static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc,
				   struct perf_event *event)
{
	int idx;
	int bit;
	int bit = -1;
	unsigned int prefix;
	unsigned int region;
	unsigned int code;
@@ -1953,7 +1953,7 @@ static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc,
	}

	idx = armv7pmu_get_event_idx(cpuc, event);
	if (idx < 0 && krait_event)
	if (idx < 0 && bit >= 0)
		clear_bit(bit, cpuc->used_mask);

	return idx;
+6 −6
Original line number Diff line number Diff line
@@ -734,9 +734,9 @@ config SOC_IMX6
	select HAVE_IMX_MMDC
	select HAVE_IMX_SRC
	select MFD_SYSCON
	select PL310_ERRATA_588369 if CACHE_PL310
	select PL310_ERRATA_727915 if CACHE_PL310
	select PL310_ERRATA_769419 if CACHE_PL310
	select PL310_ERRATA_588369 if CACHE_L2X0
	select PL310_ERRATA_727915 if CACHE_L2X0
	select PL310_ERRATA_769419 if CACHE_L2X0

config SOC_IMX6Q
	bool "i.MX6 Quad/DualLite support"
@@ -771,9 +771,9 @@ config SOC_VF610
	select ARM_GIC
	select PINCTRL_VF610
	select VF_PIT_TIMER
	select PL310_ERRATA_588369 if CACHE_PL310
	select PL310_ERRATA_727915 if CACHE_PL310
	select PL310_ERRATA_769419 if CACHE_PL310
	select PL310_ERRATA_588369 if CACHE_L2X0
	select PL310_ERRATA_727915 if CACHE_L2X0
	select PL310_ERRATA_769419 if CACHE_L2X0

	help
	  This enable support for Freescale Vybrid VF610 processor.
+2 −2
Original line number Diff line number Diff line
@@ -34,8 +34,8 @@ config ARCH_OMAP4
	select HAVE_ARM_SCU if SMP
	select HAVE_ARM_TWD if SMP
	select OMAP_INTERCONNECT
	select PL310_ERRATA_588369
	select PL310_ERRATA_727915
	select PL310_ERRATA_588369 if CACHE_L2X0
	select PL310_ERRATA_727915 if CACHE_L2X0
	select PM_OPP if PM
	select PM_RUNTIME if CPU_IDLE
	select ARM_ERRATA_754322
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