Loading drivers/video/fbdev/msm/mdss_hdmi_edid.c +8 −5 Original line number Diff line number Diff line Loading @@ -1370,8 +1370,10 @@ static void hdmi_edid_extract_sink_caps(struct hdmi_edid_ctrl *edid_ctrl, return; /* Max TMDS clock is in multiples of 5Mhz. */ if (len >= 7) if (len >= 7 && vsd[7]) { edid_ctrl->sink_caps.max_pclk_in_hz = vsd[7] * 5000000; DEV_DBG("%s: MaxTMDS=%dMHz\n", __func__, (u32)vsd[7] * 5); } vsd = hdmi_edid_find_hfvsdb(in_buf); Loading @@ -1384,9 +1386,13 @@ static void hdmi_edid_extract_sink_caps(struct hdmi_edid_ctrl *edid_ctrl, * the sink shall set this filed to 0. The max TMDS support * clock Rate = Max_TMDS_Character_Rates * 5Mhz. */ if (vsd[5] != 0) if (vsd[5] != 0) { edid_ctrl->sink_caps.max_pclk_in_hz = vsd[5] * 5000000; DEV_DBG("%s: HF-VSDB: MaxTMDS=%dMHz\n", __func__, (u32)vsd[5] * 5); } edid_ctrl->sink_caps.scdc_present = (vsd[6] & 0x80) ? true : false; edid_ctrl->sink_caps.scramble_support = Loading Loading @@ -1464,9 +1470,6 @@ static u32 hdmi_edid_extract_ieee_reg_id(struct hdmi_edid_ctrl *edid_ctrl, DEV_DBG("%s: EDID: VSD PhyAddr=%04x\n", __func__, ((u32)vsd[4] << 8) + (u32)vsd[5]); if (len >= 7) DEV_DBG("%s: MaxTMDS=%dMHz\n", __func__, (u32)vsd[7] * 5); edid_ctrl->physical_address = ((u16)vsd[4] << 8) + (u16)vsd[5]; return ((u32)vsd[3] << 16) + ((u32)vsd[2] << 8) + (u32)vsd[1]; Loading Loading
drivers/video/fbdev/msm/mdss_hdmi_edid.c +8 −5 Original line number Diff line number Diff line Loading @@ -1370,8 +1370,10 @@ static void hdmi_edid_extract_sink_caps(struct hdmi_edid_ctrl *edid_ctrl, return; /* Max TMDS clock is in multiples of 5Mhz. */ if (len >= 7) if (len >= 7 && vsd[7]) { edid_ctrl->sink_caps.max_pclk_in_hz = vsd[7] * 5000000; DEV_DBG("%s: MaxTMDS=%dMHz\n", __func__, (u32)vsd[7] * 5); } vsd = hdmi_edid_find_hfvsdb(in_buf); Loading @@ -1384,9 +1386,13 @@ static void hdmi_edid_extract_sink_caps(struct hdmi_edid_ctrl *edid_ctrl, * the sink shall set this filed to 0. The max TMDS support * clock Rate = Max_TMDS_Character_Rates * 5Mhz. */ if (vsd[5] != 0) if (vsd[5] != 0) { edid_ctrl->sink_caps.max_pclk_in_hz = vsd[5] * 5000000; DEV_DBG("%s: HF-VSDB: MaxTMDS=%dMHz\n", __func__, (u32)vsd[5] * 5); } edid_ctrl->sink_caps.scdc_present = (vsd[6] & 0x80) ? true : false; edid_ctrl->sink_caps.scramble_support = Loading Loading @@ -1464,9 +1470,6 @@ static u32 hdmi_edid_extract_ieee_reg_id(struct hdmi_edid_ctrl *edid_ctrl, DEV_DBG("%s: EDID: VSD PhyAddr=%04x\n", __func__, ((u32)vsd[4] << 8) + (u32)vsd[5]); if (len >= 7) DEV_DBG("%s: MaxTMDS=%dMHz\n", __func__, (u32)vsd[7] * 5); edid_ctrl->physical_address = ((u16)vsd[4] << 8) + (u16)vsd[5]; return ((u32)vsd[3] << 16) + ((u32)vsd[2] << 8) + (u32)vsd[1]; Loading