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Commit b00cfc01 authored by Simon Horman's avatar Simon Horman Committed by Greg Kroah-Hartman
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ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for msiof nodes 




[ Upstream commit 654450baf2afba86cf328e1849ccac61ec4630af ]

Use recently added R-Car Gen 2 fallback binding for msiof nodes in
DT for r8a7790 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7790 and the
fallback binding for R-Car Gen 2.

Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSasha Levin <alexander.levin@verizon.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 6a501bdd

arch/arm/boot/dts/r8a7790.dtsi

+8 −4
Original line number Diff line number Diff line
@@ -1409,7 +1409,8 @@ 
	};



	msiof0: spi@e6e20000 {

		compatible = "renesas,msiof-r8a7790";

		compatible = "renesas,msiof-r8a7790",

			     "renesas,rcar-gen2-msiof";

		reg = <0 0xe6e20000 0 0x0064>;

		interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
@@ -1422,7 +1423,8 @@ 
	};



	msiof1: spi@e6e10000 {

		compatible = "renesas,msiof-r8a7790";

		compatible = "renesas,msiof-r8a7790",

			     "renesas,rcar-gen2-msiof";

		reg = <0 0xe6e10000 0 0x0064>;

		interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
@@ -1435,7 +1437,8 @@ 
	};



	msiof2: spi@e6e00000 {

		compatible = "renesas,msiof-r8a7790";

		compatible = "renesas,msiof-r8a7790",

			     "renesas,rcar-gen2-msiof";

		reg = <0 0xe6e00000 0 0x0064>;

		interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
@@ -1448,7 +1451,8 @@ 
	};



	msiof3: spi@e6c90000 {

		compatible = "renesas,msiof-r8a7790";

		compatible = "renesas,msiof-r8a7790",

			     "renesas,rcar-gen2-msiof";

		reg = <0 0xe6c90000 0 0x0064>;

		interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;