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Commit ad267f4b authored by Manaf Meethalavalappu Pallikunhi's avatar Manaf Meethalavalappu Pallikunhi Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add thermal mitigation properties to msmfalcon 



Add thermal properties to enable kernel thermal monitoring and
mitigations like hotplug, thermal reset, vdd restriction, etc.
for msmfalcon. Add mitigation profiles for each physical CPU which
has information like sensor to monitor and various mitigation types
to enable for msmfalcon.

Change-Id: I36ca125143cf9929fb0bd781990bdd8ab1dbeebf
Signed-off-by: default avatarManaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
parent d1dfa514

arch/arm/boot/dts/qcom/msmfalcon.dtsi

+74 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x0>;

			enable-method = "psci";

			qcom,limits-info = <&mitigation_profile0>;

		};



		CPU1: cpu@1 {
@@ -54,6 +55,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x1>;

			enable-method = "psci";

			qcom,limits-info = <&mitigation_profile0>;

		};



		CPU2: cpu@2 {
@@ -61,6 +63,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x2>;

			enable-method = "psci";

			qcom,limits-info = <&mitigation_profile0>;

		};



		CPU3: cpu@3 {
@@ -68,6 +71,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x3>;

			enable-method = "psci";

			qcom,limits-info = <&mitigation_profile0>;

		};



		CPU4: cpu@100 {
@@ -75,6 +79,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x100>;

			enable-method = "psci";

			qcom,limits-info = <&mitigation_profile1>;

		};



		CPU5: cpu@101 {
@@ -82,6 +87,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x101>;

			enable-method = "psci";

			qcom,limits-info = <&mitigation_profile2>;

		};



		CPU6: cpu@102 {
@@ -89,6 +95,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x102>;

			enable-method = "psci";

			qcom,limits-info = <&mitigation_profile3>;

		};



		CPU7: cpu@103 {
@@ -96,6 +103,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x103>;

			enable-method = "psci";

			qcom,limits-info = <&mitigation_profile4>;

		};



		cpu-map {
@@ -459,6 +467,72 @@ 
		};

	};



	mitigation_profile0: qcom,limit_info-0 {

		qcom,temperature-sensor = <&sensor_information1>;

		qcom,hotplug-mitigation-enable;

	};



	mitigation_profile1: qcom,limit_info-1 {

		qcom,temperature-sensor = <&sensor_information3>;

		qcom,hotplug-mitigation-enable;

	};



	mitigation_profile2: qcom,limit_info-2 {

		qcom,temperature-sensor = <&sensor_information4>;

		qcom,hotplug-mitigation-enable;

	};



	mitigation_profile3: qcom,limit_info-3 {

		qcom,temperature-sensor = <&sensor_information5>;

		qcom,hotplug-mitigation-enable;

	};



	mitigation_profile4: qcom,limit_info-4 {

		qcom,temperature-sensor = <&sensor_information6>;

		qcom,hotplug-mitigation-enable;

	};



	qcom,msm-thermal {

		compatible = "qcom,msm-thermal";

		qcom,sensor-id = <1>;

		qcom,poll-ms = <100>;

		qcom,therm-reset-temp = <115>;

		qcom,core-limit-temp = <70>;

		qcom,core-temp-hysteresis = <10>;

		qcom,hotplug-temp = <105>;

		qcom,hotplug-temp-hysteresis = <20>;

		qcom,online-hotplug-core;

		qcom,synchronous-cluster-id = <0 1>;

		qcom,synchronous-cluster-map = <0 4 &CPU0 &CPU1 &CPU2 &CPU3>,

						<1 4 &CPU4 &CPU5 &CPU6 &CPU7>;



		qcom,vdd-restriction-temp = <5>;

		qcom,vdd-restriction-temp-hysteresis = <10>;



		vdd-dig-supply = <&pm2falcon_s3_floor_level>;

		vdd-gfx-supply = <&gfx_vreg_corner>;



		qcom,vdd-dig-rstr{

			qcom,vdd-rstr-reg = "vdd-dig";

			qcom,levels = <RPM_SMD_REGULATOR_LEVEL_NOM

					RPM_SMD_REGULATOR_LEVEL_TURBO

					RPM_SMD_REGULATOR_LEVEL_TURBO>;

			qcom,min-level = <RPM_SMD_REGULATOR_LEVEL_NONE>;

		};



		qcom,vdd-gfx-rstr{

			qcom,vdd-rstr-reg = "vdd-gfx";

			qcom,levels = <5 6 6>; /* Nominal, Turbo, Turbo */

			qcom,min-level = <1>; /* No Request */

		};



		msm_thermal_freq: qcom,vdd-apps-rstr{

			qcom,vdd-rstr-reg = "vdd-apps";

			qcom,levels = <1248000>;

			qcom,freq-req;

		};

	};



	uartblsp2dm1: serial@0c1b0000 {

		compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";

		reg = <0xc1b0000 0x1000>;