Merge "ARM: dts: msm: Update USB core clock frequency to allow SVS"

arch/arm/boot/dts/qcom/msmcobalt.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -1766,6 +1766,7 @@
		clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
		"utmi_clk", "sleep_clk", "xo";

		qcom,core-clk-rate = <120000000>;
		dwc3@a800000 {
		compatible = "snps,dwc3";
		reg = <0x0a800000 0xcd00>;