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Commit a9cdab86 authored by Stephen Hemminger's avatar Stephen Hemminger Committed by Francois Romieu
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skge: NAPI/irq race fix 



Fix a race in the receive NAPI, irq handling. The interrupt clear and the
start need to be separated.  Otherwise there is a window between the last
frame received and the NAPI done level handling.

Signed-off-by: default avatarStephen Hemminger <shemminger@osdl.org>
parent 61a4dcc2

drivers/net/skge.c

+5 −12
Original line number Original line Diff line number Diff line
@@ -2678,8 +2678,7 @@ static int skge_poll(struct net_device *dev, int *budget) 




	/* restart receiver */

	/* restart receiver */

	wmb();

	wmb();

	skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR),

	skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), CSR_START);

		    CSR_START | CSR_IRQ_CL_F);





	*budget -= work_done;

	*budget -= work_done;

	dev->quota -= work_done;

	dev->quota -= work_done;
@@ -2856,14 +2855,6 @@ static void skge_extirq(unsigned long data) 
	local_irq_enable();

	local_irq_enable();

}

}





static inline void skge_wakeup(struct net_device *dev)

{

	struct skge_port *skge = netdev_priv(dev);



	prefetch(skge->rx_ring.to_clean);

	netif_rx_schedule(dev);

}



static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs)

static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs)

{

{

	struct skge_hw *hw = dev_id;

	struct skge_hw *hw = dev_id;
@@ -2874,13 +2865,15 @@ static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs) 




	status &= hw->intr_mask;

	status &= hw->intr_mask;

	if (status & IS_R1_F) {

	if (status & IS_R1_F) {

		skge_write8(hw, Q_ADDR(Q_R1, Q_CSR), CSR_IRQ_CL_F);

		hw->intr_mask &= ~IS_R1_F;

		hw->intr_mask &= ~IS_R1_F;

		skge_wakeup(hw->dev[0]);

		netif_rx_schedule(hw->dev[0]);

	}

	}





	if (status & IS_R2_F) {

	if (status & IS_R2_F) {

		skge_write8(hw, Q_ADDR(Q_R2, Q_CSR), CSR_IRQ_CL_F);

		hw->intr_mask &= ~IS_R2_F;

		hw->intr_mask &= ~IS_R2_F;

		skge_wakeup(hw->dev[1]);

		netif_rx_schedule(hw->dev[1]);

	}

	}





	if (status & IS_XA1_F)

	if (status & IS_XA1_F)