Loading Documentation/filesystems/proc.txt +3 −6 Original line number Diff line number Diff line Loading @@ -347,7 +347,7 @@ address perms offset dev inode pathname a7cb1000-a7cb2000 ---p 00000000 00:00 0 a7cb2000-a7eb2000 rw-p 00000000 00:00 0 a7eb2000-a7eb3000 ---p 00000000 00:00 0 a7eb3000-a7ed5000 rw-p 00000000 00:00 0 [stack:1001] a7eb3000-a7ed5000 rw-p 00000000 00:00 0 a7ed5000-a8008000 r-xp 00000000 03:00 4222 /lib/libc.so.6 a8008000-a800a000 r--p 00133000 03:00 4222 /lib/libc.so.6 a800a000-a800b000 rw-p 00135000 03:00 4222 /lib/libc.so.6 Loading Loading @@ -379,7 +379,6 @@ is not associated with a file: [heap] = the heap of the program [stack] = the stack of the main process [stack:1001] = the stack of the thread with tid 1001 [vdso] = the "virtual dynamic shared object", the kernel system call handler [anon:<name>] = an anonymous mapping that has been Loading @@ -389,10 +388,8 @@ is not associated with a file: The /proc/PID/task/TID/maps is a view of the virtual memory from the viewpoint of the individual tasks of a process. In this file you will see a mapping marked as [stack] if that task sees it as a stack. This is a key difference from the content of /proc/PID/maps, where you will see all mappings that are being used as stack by all of those tasks. Hence, for the example above, the task-level map, i.e. /proc/PID/task/TID/maps for thread 1001 will look like this: as [stack] if that task sees it as a stack. Hence, for the example above, the task-level map, i.e. /proc/PID/task/TID/maps for thread 1001 will look like this: 08048000-08049000 r-xp 00000000 03:00 8312 /opt/test 08049000-0804a000 rw-p 00001000 03:00 8312 /opt/test Loading Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 4 SUBLEVEL = 20 SUBLEVEL = 21 EXTRAVERSION = NAME = Blurry Fish Butt Loading arch/arm64/Kconfig +20 −0 Original line number Diff line number Diff line Loading @@ -425,6 +425,15 @@ config CAVIUM_ERRATUM_22375 If unsure, say Y. config CAVIUM_ERRATUM_23144 bool "Cavium erratum 23144: ITS SYNC hang on dual socket system" depends on NUMA default y help ITS SYNC command hang for cross node io and collections/cpu mapping. If unsure, say Y. config CAVIUM_ERRATUM_23154 bool "Cavium erratum 23154: Access to ICC_IAR1_EL1 is not sync'ed" default y Loading @@ -435,6 +444,17 @@ config CAVIUM_ERRATUM_23154 If unsure, say Y. config CAVIUM_ERRATUM_27456 bool "Cavium erratum 27456: Broadcast TLBI instructions may cause icache corruption" default y help On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI instructions may cause the icache to become corrupted if it contains data for a non-current ASID. The fix is to invalidate the icache when changing the mm context. If unsure, say Y. endmenu Loading arch/arm64/include/asm/arch_gicv3.h +1 −0 Original line number Diff line number Diff line Loading @@ -103,6 +103,7 @@ static inline u64 gic_read_iar_common(void) u64 irqstat; asm volatile("mrs_s %0, " __stringify(ICC_IAR1_EL1) : "=r" (irqstat)); dsb(sy); return irqstat; } Loading arch/arm64/include/asm/cpufeature.h +2 −1 Original line number Diff line number Diff line Loading @@ -30,8 +30,9 @@ #define ARM64_HAS_LSE_ATOMICS 5 #define ARM64_WORKAROUND_CAVIUM_23154 6 #define ARM64_WORKAROUND_834220 7 #define ARM64_WORKAROUND_CAVIUM_27456 8 #define ARM64_NCAPS 8 #define ARM64_NCAPS 9 #ifndef __ASSEMBLY__ Loading Loading
Documentation/filesystems/proc.txt +3 −6 Original line number Diff line number Diff line Loading @@ -347,7 +347,7 @@ address perms offset dev inode pathname a7cb1000-a7cb2000 ---p 00000000 00:00 0 a7cb2000-a7eb2000 rw-p 00000000 00:00 0 a7eb2000-a7eb3000 ---p 00000000 00:00 0 a7eb3000-a7ed5000 rw-p 00000000 00:00 0 [stack:1001] a7eb3000-a7ed5000 rw-p 00000000 00:00 0 a7ed5000-a8008000 r-xp 00000000 03:00 4222 /lib/libc.so.6 a8008000-a800a000 r--p 00133000 03:00 4222 /lib/libc.so.6 a800a000-a800b000 rw-p 00135000 03:00 4222 /lib/libc.so.6 Loading Loading @@ -379,7 +379,6 @@ is not associated with a file: [heap] = the heap of the program [stack] = the stack of the main process [stack:1001] = the stack of the thread with tid 1001 [vdso] = the "virtual dynamic shared object", the kernel system call handler [anon:<name>] = an anonymous mapping that has been Loading @@ -389,10 +388,8 @@ is not associated with a file: The /proc/PID/task/TID/maps is a view of the virtual memory from the viewpoint of the individual tasks of a process. In this file you will see a mapping marked as [stack] if that task sees it as a stack. This is a key difference from the content of /proc/PID/maps, where you will see all mappings that are being used as stack by all of those tasks. Hence, for the example above, the task-level map, i.e. /proc/PID/task/TID/maps for thread 1001 will look like this: as [stack] if that task sees it as a stack. Hence, for the example above, the task-level map, i.e. /proc/PID/task/TID/maps for thread 1001 will look like this: 08048000-08049000 r-xp 00000000 03:00 8312 /opt/test 08049000-0804a000 rw-p 00001000 03:00 8312 /opt/test Loading
Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 4 SUBLEVEL = 20 SUBLEVEL = 21 EXTRAVERSION = NAME = Blurry Fish Butt Loading
arch/arm64/Kconfig +20 −0 Original line number Diff line number Diff line Loading @@ -425,6 +425,15 @@ config CAVIUM_ERRATUM_22375 If unsure, say Y. config CAVIUM_ERRATUM_23144 bool "Cavium erratum 23144: ITS SYNC hang on dual socket system" depends on NUMA default y help ITS SYNC command hang for cross node io and collections/cpu mapping. If unsure, say Y. config CAVIUM_ERRATUM_23154 bool "Cavium erratum 23154: Access to ICC_IAR1_EL1 is not sync'ed" default y Loading @@ -435,6 +444,17 @@ config CAVIUM_ERRATUM_23154 If unsure, say Y. config CAVIUM_ERRATUM_27456 bool "Cavium erratum 27456: Broadcast TLBI instructions may cause icache corruption" default y help On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI instructions may cause the icache to become corrupted if it contains data for a non-current ASID. The fix is to invalidate the icache when changing the mm context. If unsure, say Y. endmenu Loading
arch/arm64/include/asm/arch_gicv3.h +1 −0 Original line number Diff line number Diff line Loading @@ -103,6 +103,7 @@ static inline u64 gic_read_iar_common(void) u64 irqstat; asm volatile("mrs_s %0, " __stringify(ICC_IAR1_EL1) : "=r" (irqstat)); dsb(sy); return irqstat; } Loading
arch/arm64/include/asm/cpufeature.h +2 −1 Original line number Diff line number Diff line Loading @@ -30,8 +30,9 @@ #define ARM64_HAS_LSE_ATOMICS 5 #define ARM64_WORKAROUND_CAVIUM_23154 6 #define ARM64_WORKAROUND_834220 7 #define ARM64_WORKAROUND_CAVIUM_27456 8 #define ARM64_NCAPS 8 #define ARM64_NCAPS 9 #ifndef __ASSEMBLY__ Loading