ARM: dts: msm: Enable SDCC ICE clock on SDM660



Enable SDCC ICE clock for ICE functionality in SDCC.

Change-Id: Ibb1aad8e9ddf3f62c2e86277abe8a066c26dffe7
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>

parent a51b7f60

arch/arm/boot/dts/qcom/sdm660.dtsi

+4 −2

Original line number	Diff line number	Diff line
		@@ -1269,8 +1269,10 @@
		100000000 200000000 400000000 4294967295>;

		clocks = <&clock_gcc GCC_SDCC1_AHB_CLK>,
		<&clock_gcc GCC_SDCC1_APPS_CLK>;
		clock-names = "iface_clk", "core_clk";
		<&clock_gcc GCC_SDCC1_APPS_CLK>,
		<&clock_gcc GCC_SDCC1_ICE_CORE_CLK>;
		clock-names = "iface_clk", "core_clk", "ice_core_clk";
		qcom,ice-clk-rates = <300000000 150000000>;

		status = "disabled";
		};