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Commit a26d3c4f authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'cleanup' of...

Merge branch 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup

* 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

:
  ARM: OMAP2+: Fix L4_EMU_34XX_BASE error after iomap changes
  ARM: OMAP2+: Limit omap_read/write usage to legacy USB drivers
  ARM: OMAP: Remove plat/io.h by splitting it into mach/io.h and mach/hardware.h
  ARM: OMAP2+: Move most of plat/io.h into local iomap.h
  ARM: OMAP1: Move most of plat/io.h into local iomap.h
  ARM: OMAP1: Move 16xx GPIO system clock to platform init code
  ARM: OMAP: Move omap_init_consistent_dma_size() to local common.h
  ARM: OMAP2+: Move SDRC related functions from io.h into local common.h
  ARM: OMAP2+: Drop DISPC L3 firewall code
  ARM: OMAP2xxx: PM: remove obsolete timer disable code in the suspend path
  ARM: OMAP: McSPI: Remove unused flag from struct omap2_mcspi_device_config

(update to latest rmk/for-arm-soc branch)

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 4d8cfec6 1b35af54
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+6 −0
Original line number Diff line number Diff line
@@ -186,6 +186,9 @@ config GENERIC_ISA_DMA
config FIQ
	bool

config NEED_RET_TO_USER
	bool

config ARCH_MTD_XIP
	bool

@@ -479,6 +482,7 @@ config ARCH_IOP13XX
	select ARCH_SUPPORTS_MSI
	select VMSPLIT_1G
	select NEED_MACH_MEMORY_H
	select NEED_RET_TO_USER
	help
	  Support for Intel's IOP13XX (XScale) family of processors.

@@ -486,6 +490,7 @@ config ARCH_IOP32X
	bool "IOP32x-based"
	depends on MMU
	select CPU_XSCALE
	select NEED_RET_TO_USER
	select PLAT_IOP
	select PCI
	select ARCH_REQUIRE_GPIOLIB
@@ -497,6 +502,7 @@ config ARCH_IOP33X
	bool "IOP33x-based"
	depends on MMU
	select CPU_XSCALE
	select NEED_RET_TO_USER
	select PLAT_IOP
	select PCI
	select ARCH_REQUIRE_GPIOLIB
+0 −8
Original line number Diff line number Diff line
@@ -11,14 +11,6 @@
/* IOC / IOMD based hardware */
#include <asm/hardware/iomd.h>

		.macro	disable_fiq
		mov	r12, #ioc_base_high
		.if	ioc_base_low
		orr	r12, r12, #ioc_base_low
		.endif
		strb	r12, [r12, #0x38]	@ Disable FIQ register
		.endm

		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
		ldrb	\irqstat, [\base, #IOMD_IRQREQB]	@ get high priority first
		ldr	\tmp, =irq_prio_h
+2 −1
Original line number Diff line number Diff line
@@ -19,7 +19,9 @@
#include <asm/glue-df.h>
#include <asm/glue-pf.h>
#include <asm/vfpmacros.h>
#ifndef CONFIG_MULTI_IRQ_HANDLER
#include <mach/entry-macro.S>
#endif
#include <asm/thread_notify.h>
#include <asm/unwind.h>
#include <asm/unistd.h>
@@ -1101,7 +1103,6 @@ __stubs_start:
 * get out of that mode without clobbering one register.
 */
vector_fiq:
	disable_fiq
	subs	pc, lr, #4

/*=============================================================================
+7 −1
Original line number Diff line number Diff line
@@ -10,9 +10,15 @@

#include <asm/unistd.h>
#include <asm/ftrace.h>
#include <mach/entry-macro.S>
#include <asm/unwind.h>

#ifdef CONFIG_NEED_RET_TO_USER
#include <mach/entry-macro.S>
#else
	.macro  arch_ret_to_user, tmp1, tmp2
	.endm
#endif

#include "entry-header.S"


+0 −6
Original line number Diff line number Diff line
@@ -13,17 +13,11 @@
#include <mach/hardware.h>
#include <mach/at91_aic.h>

	.macro	disable_fiq
	.endm

	.macro  get_irqnr_preamble, base, tmp
	ldr	\base, =at91_aic_base		@ base virtual address of AIC peripheral
	ldr	\base, [\base]
	.endm

	.macro  arch_ret_to_user, tmp1, tmp2
	.endm

	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
	ldr	\irqnr, [\base, #AT91_AIC_IVR]		@ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
	ldr	\irqstat, [\base, #AT91_AIC_ISR]	@ read interrupt source number
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