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Commit a0c5da88 authored by Jordan Crouse's avatar Jordan Crouse
Browse files

drm/msm: Remember the state of A5XX hardware clock gating



Remember if the A5XX hardware clock gating is currently
enabled or disabled to avoid inadvertently enabling it.

Change-Id: Ic0dedbada3734a257ac966c041d06695f3521ad4
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent 74910dd6
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+6 −0
Original line number Diff line number Diff line
@@ -375,6 +375,7 @@ static const struct {
void a5xx_set_hwcg(struct msm_gpu *gpu, bool state)
{
	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
	unsigned int i;

	for (i = 0; i < ARRAY_SIZE(a5xx_hwcg); i++)
@@ -391,6 +392,11 @@ void a5xx_set_hwcg(struct msm_gpu *gpu, bool state)

	gpu_write(gpu, REG_A5XX_RBBM_CLOCK_CNTL, state ? 0xAAA8AA00 : 0);
	gpu_write(gpu, REG_A5XX_RBBM_ISDB_CNT, state ? 0x182 : 0x180);

	if (state)
		set_bit(A5XX_HWCG_ENABLED, &a5xx_gpu->flags);
	else
		clear_bit(A5XX_HWCG_ENABLED, &a5xx_gpu->flags);
}

static int a5xx_me_init(struct msm_gpu *gpu)
+1 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@

enum {
	A5XX_ZAP_SHADER_LOADED = 1,
	A5XX_HWCG_ENABLED = 2,
};

struct a5xx_gpu {