Loading arch/arm/boot/dts/qcom/msmcobalt-pm.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -24,7 +24,7 @@ qcom,vctl-port = <0x0>; qcom,phase-port = <0x1>; qcom,saw2-avs-ctl = <0x1010031>; qcom,saw2-avs-limit = <0x4000208>; qcom,saw2-avs-limit = <0x4580458>; qcom,pfm-port = <0x2>; }; Loading @@ -40,7 +40,7 @@ qcom,vctl-port = <0x0>; qcom,phase-port = <0x1>; qcom,saw2-avs-ctl = <0x1010031>; qcom,saw2-avs-limit = <0x4000208>; qcom,saw2-avs-limit = <0x4580458>; qcom,pfm-port = <0x2>; }; Loading arch/arm/boot/dts/qcom/msmcobalt-regulator.dtsi +42 −0 Original line number Diff line number Diff line Loading @@ -537,6 +537,28 @@ qcom,enable-time = <500>; }; }; qcom,pmcobalt@1 { pmcobalt_s10: regulator@2f00 { compatible = "qcom,qpnp-regulator"; reg = <0x2f00 0x100>; regulator-name = "pmcobalt_s10"; regulator-min-microvolt = <572000>; regulator-max-microvolt = <1112000>; qcom,enable-time = <500>; regulator-always-on; }; pmcobalt_s13: regulator@3800 { compatible = "qcom,qpnp-regulator"; reg = <0x3800 0x100>; regulator-name = "pmcobalt_s13"; regulator-min-microvolt = <572000>; regulator-max-microvolt = <1112000>; qcom,enable-time = <500>; regulator-always-on; }; }; }; /* Stub regulators */ Loading Loading @@ -590,6 +612,9 @@ qcom,cpr-panic-reg-name-list = "PWR_CPRH_STATUS", "APCLUS0_L2_SAW4_PMIC_STS"; qcom,cpr-aging-ref-voltage = <1112000>; vdd-supply = <&pmcobalt_s10>; thread@0 { qcom,cpr-thread-id = <0>; qcom,cpr-consecutive-up = <0>; Loading Loading @@ -712,6 +737,13 @@ qcom,allow-voltage-interpolation; qcom,allow-quotient-interpolation; qcom,cpr-scaled-open-loop-voltage-as-ceiling; qcom,cpr-aging-max-voltage-adjustment = <15000>; qcom,cpr-aging-ref-corner = <22>; qcom,cpr-aging-ro-scaling-factor = <2950>; qcom,allow-aging-voltage-adjustment = <0>; qcom,allow-aging-open-loop-voltage-adjustment = <1>; }; }; }; Loading Loading @@ -752,6 +784,9 @@ qcom,cpr-panic-reg-name-list = "PERF_CPRH_STATUS", "APCLUS1_L2_SAW4_PMIC_STS"; qcom,cpr-aging-ref-voltage = <1112000>; vdd-supply = <&pmcobalt_s13>; thread@0 { qcom,cpr-thread-id = <0>; qcom,cpr-consecutive-up = <0>; Loading Loading @@ -894,6 +929,13 @@ qcom,allow-voltage-interpolation; qcom,allow-quotient-interpolation; qcom,cpr-scaled-open-loop-voltage-as-ceiling; qcom,cpr-aging-max-voltage-adjustment = <15000>; qcom,cpr-aging-ref-corner = <25>; qcom,cpr-aging-ro-scaling-factor = <2950>; qcom,allow-aging-voltage-adjustment = <0>; qcom,allow-aging-open-loop-voltage-adjustment = <1>; }; }; }; Loading arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi +32 −0 Original line number Diff line number Diff line Loading @@ -227,9 +227,20 @@ qcom,max-bandwidth-per-pipe-kbps = <4700000>; }; &pmcobalt_s10 { regulator-min-microvolt = <568000>; regulator-max-microvolt = <1056000>; }; &pmcobalt_s13 { regulator-min-microvolt = <568000>; regulator-max-microvolt = <1056000>; }; &apc0_cpr { compatible = "qcom,cprh-msmcobalt-v2-kbss-regulator"; qcom,cpr-corner-switch-delay-time = <1042>; qcom,cpr-aging-ref-voltage = <1056000>; }; &apc0_pwrcl_vreg { Loading Loading @@ -371,11 +382,16 @@ qcom,allow-voltage-interpolation; qcom,allow-quotient-interpolation; qcom,cpr-scaled-open-loop-voltage-as-ceiling; qcom,cpr-aging-ref-corner = <22 22>; qcom,cpr-aging-ro-scaling-factor = <2950>; qcom,allow-aging-voltage-adjustment = <0>; }; &apc1_cpr { compatible = "qcom,cprh-msmcobalt-v2-kbss-regulator"; qcom,cpr-corner-switch-delay-time = <1042>; qcom,cpr-aging-ref-voltage = <1056000>; }; &apc1_perfcl_vreg { Loading Loading @@ -527,6 +543,10 @@ qcom,allow-voltage-interpolation; qcom,allow-quotient-interpolation; qcom,cpr-scaled-open-loop-voltage-as-ceiling; qcom,cpr-aging-ref-corner = <30 26>; qcom,cpr-aging-ro-scaling-factor = <2950>; qcom,allow-aging-voltage-adjustment = <0>; }; &pm8005_s1 { Loading Loading @@ -693,6 +713,18 @@ }; &soc { /* Gold L2 SAW */ qcom,spm@178120000 { qcom,saw2-avs-limit = <0x4200420>; }; /* Silver L2 SAW */ qcom,spm@179120000 { qcom,saw2-avs-limit = <0x4200420>; }; }; /* GPU overrides */ &msm_gpu { /* Updated chip ID */ Loading Loading
arch/arm/boot/dts/qcom/msmcobalt-pm.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -24,7 +24,7 @@ qcom,vctl-port = <0x0>; qcom,phase-port = <0x1>; qcom,saw2-avs-ctl = <0x1010031>; qcom,saw2-avs-limit = <0x4000208>; qcom,saw2-avs-limit = <0x4580458>; qcom,pfm-port = <0x2>; }; Loading @@ -40,7 +40,7 @@ qcom,vctl-port = <0x0>; qcom,phase-port = <0x1>; qcom,saw2-avs-ctl = <0x1010031>; qcom,saw2-avs-limit = <0x4000208>; qcom,saw2-avs-limit = <0x4580458>; qcom,pfm-port = <0x2>; }; Loading
arch/arm/boot/dts/qcom/msmcobalt-regulator.dtsi +42 −0 Original line number Diff line number Diff line Loading @@ -537,6 +537,28 @@ qcom,enable-time = <500>; }; }; qcom,pmcobalt@1 { pmcobalt_s10: regulator@2f00 { compatible = "qcom,qpnp-regulator"; reg = <0x2f00 0x100>; regulator-name = "pmcobalt_s10"; regulator-min-microvolt = <572000>; regulator-max-microvolt = <1112000>; qcom,enable-time = <500>; regulator-always-on; }; pmcobalt_s13: regulator@3800 { compatible = "qcom,qpnp-regulator"; reg = <0x3800 0x100>; regulator-name = "pmcobalt_s13"; regulator-min-microvolt = <572000>; regulator-max-microvolt = <1112000>; qcom,enable-time = <500>; regulator-always-on; }; }; }; /* Stub regulators */ Loading Loading @@ -590,6 +612,9 @@ qcom,cpr-panic-reg-name-list = "PWR_CPRH_STATUS", "APCLUS0_L2_SAW4_PMIC_STS"; qcom,cpr-aging-ref-voltage = <1112000>; vdd-supply = <&pmcobalt_s10>; thread@0 { qcom,cpr-thread-id = <0>; qcom,cpr-consecutive-up = <0>; Loading Loading @@ -712,6 +737,13 @@ qcom,allow-voltage-interpolation; qcom,allow-quotient-interpolation; qcom,cpr-scaled-open-loop-voltage-as-ceiling; qcom,cpr-aging-max-voltage-adjustment = <15000>; qcom,cpr-aging-ref-corner = <22>; qcom,cpr-aging-ro-scaling-factor = <2950>; qcom,allow-aging-voltage-adjustment = <0>; qcom,allow-aging-open-loop-voltage-adjustment = <1>; }; }; }; Loading Loading @@ -752,6 +784,9 @@ qcom,cpr-panic-reg-name-list = "PERF_CPRH_STATUS", "APCLUS1_L2_SAW4_PMIC_STS"; qcom,cpr-aging-ref-voltage = <1112000>; vdd-supply = <&pmcobalt_s13>; thread@0 { qcom,cpr-thread-id = <0>; qcom,cpr-consecutive-up = <0>; Loading Loading @@ -894,6 +929,13 @@ qcom,allow-voltage-interpolation; qcom,allow-quotient-interpolation; qcom,cpr-scaled-open-loop-voltage-as-ceiling; qcom,cpr-aging-max-voltage-adjustment = <15000>; qcom,cpr-aging-ref-corner = <25>; qcom,cpr-aging-ro-scaling-factor = <2950>; qcom,allow-aging-voltage-adjustment = <0>; qcom,allow-aging-open-loop-voltage-adjustment = <1>; }; }; }; Loading
arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi +32 −0 Original line number Diff line number Diff line Loading @@ -227,9 +227,20 @@ qcom,max-bandwidth-per-pipe-kbps = <4700000>; }; &pmcobalt_s10 { regulator-min-microvolt = <568000>; regulator-max-microvolt = <1056000>; }; &pmcobalt_s13 { regulator-min-microvolt = <568000>; regulator-max-microvolt = <1056000>; }; &apc0_cpr { compatible = "qcom,cprh-msmcobalt-v2-kbss-regulator"; qcom,cpr-corner-switch-delay-time = <1042>; qcom,cpr-aging-ref-voltage = <1056000>; }; &apc0_pwrcl_vreg { Loading Loading @@ -371,11 +382,16 @@ qcom,allow-voltage-interpolation; qcom,allow-quotient-interpolation; qcom,cpr-scaled-open-loop-voltage-as-ceiling; qcom,cpr-aging-ref-corner = <22 22>; qcom,cpr-aging-ro-scaling-factor = <2950>; qcom,allow-aging-voltage-adjustment = <0>; }; &apc1_cpr { compatible = "qcom,cprh-msmcobalt-v2-kbss-regulator"; qcom,cpr-corner-switch-delay-time = <1042>; qcom,cpr-aging-ref-voltage = <1056000>; }; &apc1_perfcl_vreg { Loading Loading @@ -527,6 +543,10 @@ qcom,allow-voltage-interpolation; qcom,allow-quotient-interpolation; qcom,cpr-scaled-open-loop-voltage-as-ceiling; qcom,cpr-aging-ref-corner = <30 26>; qcom,cpr-aging-ro-scaling-factor = <2950>; qcom,allow-aging-voltage-adjustment = <0>; }; &pm8005_s1 { Loading Loading @@ -693,6 +713,18 @@ }; &soc { /* Gold L2 SAW */ qcom,spm@178120000 { qcom,saw2-avs-limit = <0x4200420>; }; /* Silver L2 SAW */ qcom,spm@179120000 { qcom,saw2-avs-limit = <0x4200420>; }; }; /* GPU overrides */ &msm_gpu { /* Updated chip ID */ Loading