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Commit 9e6b178e authored by Liam Mark's avatar Liam Mark
Browse files

iommu/io-pgtable-arm: Use outer shareable for all configurations 



Change over to using outer shareable for both coherent and
non-coherent page tables and for both coherent and non-coherent
data buffers.
This is done to be more in line with the ARM spec.

Change-Id: Icebf88641a5ebb82bb4b7577d1ab402580b1460c
Signed-off-by: default avatarLiam Mark <lmark@codeaurora.org>
parent 773f15cd

drivers/iommu/io-pgtable-arm.c

+3 −5
Original line number Diff line number Diff line
@@ -363,7 +363,7 @@ static int arm_lpae_init_pte(struct arm_lpae_io_pgtable *data, 
	else

		pte |= ARM_LPAE_PTE_TYPE_BLOCK;



	pte |= ARM_LPAE_PTE_AF | ARM_LPAE_PTE_SH_IS;

	pte |= ARM_LPAE_PTE_AF | ARM_LPAE_PTE_SH_OS;

	pte |= pfn_to_iopte(paddr >> data->pg_shift, data);



	*ptep = pte;
@@ -481,11 +481,9 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data, 
			pte |= (prot & IOMMU_PRIV) ? ARM_LPAE_PTE_AP_PRIV_RO

					: ARM_LPAE_PTE_AP_RO;



		if (prot & IOMMU_CACHE) {

		if (prot & IOMMU_CACHE)

			pte |= (ARM_LPAE_MAIR_ATTR_IDX_CACHE

				<< ARM_LPAE_PTE_ATTRINDX_SHIFT);

			pte |= ARM_LPAE_PTE_SH_OS;

		}



		if (prot & IOMMU_DEVICE)

			pte |= (ARM_LPAE_MAIR_ATTR_IDX_DEV <<
@@ -942,7 +940,7 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie) 
			(ARM_LPAE_TCR_RGN_WBWA << ARM_LPAE_TCR_IRGN0_SHIFT) |

			(ARM_LPAE_TCR_RGN_WBWA << ARM_LPAE_TCR_ORGN0_SHIFT);

	else

		reg = (ARM_LPAE_TCR_SH_IS << ARM_LPAE_TCR_SH0_SHIFT) |

		reg = (ARM_LPAE_TCR_SH_OS << ARM_LPAE_TCR_SH0_SHIFT) |

			(ARM_LPAE_TCR_RGN_NC << ARM_LPAE_TCR_IRGN0_SHIFT) |

			(ARM_LPAE_TCR_RGN_NC << ARM_LPAE_TCR_ORGN0_SHIFT);