Loading arch/arm/include/asm/mach/map.h +0 −2 Original line number Diff line number Diff line Loading @@ -26,8 +26,6 @@ struct map_desc { #define MT_MEMORY 8 #define MT_ROM 9 #define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED #ifdef CONFIG_MMU extern void iotable_init(struct map_desc *, int); #else Loading arch/arm/mach-mx3/mm.c +1 −1 Original line number Diff line number Diff line Loading @@ -49,7 +49,7 @@ static struct map_desc mxc_io_desc[] __initdata = { .virtual = AVIC_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AVIC_BASE_ADDR), .length = AVIC_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, }; Loading arch/arm/mach-mx3/mx31ads.c +3 −3 Original line number Diff line number Diff line Loading @@ -92,17 +92,17 @@ static struct map_desc mx31ads_io_desc[] __initdata = { .virtual = AIPS1_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), .length = AIPS1_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, { .virtual = SPBA0_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), .length = SPBA0_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, { .virtual = AIPS2_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), .length = AIPS2_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, { .virtual = CS4_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(CS4_BASE_ADDR), Loading arch/arm/mach-mx3/mx31lite.c +3 −3 Original line number Diff line number Diff line Loading @@ -45,17 +45,17 @@ static struct map_desc mx31lite_io_desc[] __initdata = { .virtual = AIPS1_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), .length = AIPS1_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, { .virtual = SPBA0_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), .length = SPBA0_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, { .virtual = AIPS2_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), .length = AIPS2_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, { .virtual = CS4_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(CS4_BASE_ADDR), Loading Loading
arch/arm/include/asm/mach/map.h +0 −2 Original line number Diff line number Diff line Loading @@ -26,8 +26,6 @@ struct map_desc { #define MT_MEMORY 8 #define MT_ROM 9 #define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED #ifdef CONFIG_MMU extern void iotable_init(struct map_desc *, int); #else Loading
arch/arm/mach-mx3/mm.c +1 −1 Original line number Diff line number Diff line Loading @@ -49,7 +49,7 @@ static struct map_desc mxc_io_desc[] __initdata = { .virtual = AVIC_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AVIC_BASE_ADDR), .length = AVIC_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, }; Loading
arch/arm/mach-mx3/mx31ads.c +3 −3 Original line number Diff line number Diff line Loading @@ -92,17 +92,17 @@ static struct map_desc mx31ads_io_desc[] __initdata = { .virtual = AIPS1_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), .length = AIPS1_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, { .virtual = SPBA0_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), .length = SPBA0_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, { .virtual = AIPS2_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), .length = AIPS2_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, { .virtual = CS4_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(CS4_BASE_ADDR), Loading
arch/arm/mach-mx3/mx31lite.c +3 −3 Original line number Diff line number Diff line Loading @@ -45,17 +45,17 @@ static struct map_desc mx31lite_io_desc[] __initdata = { .virtual = AIPS1_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), .length = AIPS1_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, { .virtual = SPBA0_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), .length = SPBA0_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, { .virtual = AIPS2_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), .length = AIPS2_SIZE, .type = MT_NONSHARED_DEVICE .type = MT_DEVICE_NONSHARED }, { .virtual = CS4_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(CS4_BASE_ADDR), Loading