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Commit 99584db3 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: extract hangcheck/reset/error_state state into substruct



This has been sprinkled all over the place in dev_priv. I think
it'd be good to also move all the code into a separate file like
i915_gem_error.c, but that's for another patch.

Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 4b5aed62
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+5 −5
Original line number Diff line number Diff line
@@ -814,11 +814,11 @@ static int i915_error_state_open(struct inode *inode, struct file *file)

	error_priv->dev = dev;

	spin_lock_irqsave(&dev_priv->error_lock, flags);
	error_priv->error = dev_priv->first_error;
	spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
	error_priv->error = dev_priv->gpu_error.first_error;
	if (error_priv->error)
		kref_get(&error_priv->error->ref);
	spin_unlock_irqrestore(&dev_priv->error_lock, flags);
	spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);

	return single_open(file, i915_error_state, error_priv);
}
@@ -1727,7 +1727,7 @@ i915_ring_stop_read(struct file *filp,
	int len;

	len = snprintf(buf, sizeof(buf),
		       "0x%08x\n", dev_priv->stop_rings);
		       "0x%08x\n", dev_priv->gpu_error.stop_rings);

	if (len > sizeof(buf))
		len = sizeof(buf);
@@ -1763,7 +1763,7 @@ i915_ring_stop_write(struct file *filp,
	if (ret)
		return ret;

	dev_priv->stop_rings = val;
	dev_priv->gpu_error.stop_rings = val;
	mutex_unlock(&dev->struct_mutex);

	return cnt;
+3 −3
Original line number Diff line number Diff line
@@ -1605,7 +1605,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
		pci_enable_msi(dev->pdev);

	spin_lock_init(&dev_priv->irq_lock);
	spin_lock_init(&dev_priv->error_lock);
	spin_lock_init(&dev_priv->gpu_error.lock);
	spin_lock_init(&dev_priv->rps.lock);
	mutex_init(&dev_priv->dpio_lock);

@@ -1725,8 +1725,8 @@ int i915_driver_unload(struct drm_device *dev)
	}

	/* Free error state after interrupts are fully disabled. */
	del_timer_sync(&dev_priv->hangcheck_timer);
	cancel_work_sync(&dev_priv->error_work);
	del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);
	cancel_work_sync(&dev_priv->gpu_error.work);
	i915_destroy_error_state(dev);

	if (dev->pdev->msi_enabled)
+4 −4
Original line number Diff line number Diff line
@@ -779,9 +779,9 @@ int intel_gpu_reset(struct drm_device *dev)
	}

	/* Also reset the gpu hangman. */
	if (dev_priv->stop_rings) {
	if (dev_priv->gpu_error.stop_rings) {
		DRM_DEBUG("Simulated gpu hang, resetting stop_rings\n");
		dev_priv->stop_rings = 0;
		dev_priv->gpu_error.stop_rings = 0;
		if (ret == -ENODEV) {
			DRM_ERROR("Reset not implemented, but ignoring "
				  "error for simulated gpu hangs\n");
@@ -820,12 +820,12 @@ int i915_reset(struct drm_device *dev)
	i915_gem_reset(dev);

	ret = -ENODEV;
	if (get_seconds() - dev_priv->last_gpu_reset < 5)
	if (get_seconds() - dev_priv->gpu_error.last_reset < 5)
		DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
	else
		ret = intel_gpu_reset(dev);

	dev_priv->last_gpu_reset = get_seconds();
	dev_priv->gpu_error.last_reset = get_seconds();
	if (ret) {
		DRM_ERROR("Failed to reset chip.\n");
		mutex_unlock(&dev->struct_mutex);
+23 −16
Original line number Diff line number Diff line
@@ -766,6 +766,28 @@ struct i915_gem_mm {
	u32 object_count;
};

struct i915_gpu_error {
	/* For hangcheck timer */
#define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */
#define DRM_I915_HANGCHECK_JIFFIES msecs_to_jiffies(DRM_I915_HANGCHECK_PERIOD)
	struct timer_list hangcheck_timer;
	int hangcheck_count;
	uint32_t last_acthd[I915_NUM_RINGS];
	uint32_t prev_instdone[I915_NUM_INSTDONE_REG];

	/* For reset and error_state handling. */
	spinlock_t lock;
	/* Protected by the above dev->gpu_error.lock. */
	struct drm_i915_error_state *first_error;
	struct work_struct work;
	struct completion completion;

	unsigned long last_reset;

	/* For gpu hang simulation. */
	unsigned int stop_rings;
};

typedef struct drm_i915_private {
	struct drm_device *dev;
	struct kmem_cache *slab;
@@ -829,16 +851,6 @@ typedef struct drm_i915_private {
	int num_pipe;
	int num_pch_pll;

	/* For hangcheck timer */
#define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */
#define DRM_I915_HANGCHECK_JIFFIES msecs_to_jiffies(DRM_I915_HANGCHECK_PERIOD)
	struct timer_list hangcheck_timer;
	int hangcheck_count;
	uint32_t last_acthd[I915_NUM_RINGS];
	uint32_t prev_instdone[I915_NUM_INSTDONE_REG];

	unsigned int stop_rings;

	unsigned long cfb_size;
	unsigned int cfb_fb;
	enum plane cfb_plane;
@@ -886,11 +898,6 @@ typedef struct drm_i915_private {

	unsigned int fsb_freq, mem_freq, is_ddr3;

	spinlock_t error_lock;
	/* Protected by dev->error_lock. */
	struct drm_i915_error_state *first_error;
	struct work_struct error_work;
	struct completion error_completion;
	struct workqueue_struct *wq;

	/* Display functions */
@@ -949,7 +956,7 @@ typedef struct drm_i915_private {
	struct drm_mm_node *compressed_fb;
	struct drm_mm_node *compressed_llb;

	unsigned long last_gpu_reset;
	struct i915_gpu_error gpu_error;

	/* list of fbdev register on this device */
	struct intel_fbdev *fbdev;
+5 −5
Original line number Diff line number Diff line
@@ -90,7 +90,7 @@ static int
i915_gem_wait_for_error(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct completion *x = &dev_priv->error_completion;
	struct completion *x = &dev_priv->gpu_error.completion;
	unsigned long flags;
	int ret;

@@ -943,7 +943,7 @@ i915_gem_check_wedge(struct drm_i915_private *dev_priv,
		     bool interruptible)
{
	if (atomic_read(&dev_priv->mm.wedged)) {
		struct completion *x = &dev_priv->error_completion;
		struct completion *x = &dev_priv->gpu_error.completion;
		bool recovery_complete;
		unsigned long flags;

@@ -2045,7 +2045,7 @@ i915_add_request(struct intel_ring_buffer *ring,

	if (!dev_priv->mm.suspended) {
		if (i915_enable_hangcheck) {
			mod_timer(&dev_priv->hangcheck_timer,
			mod_timer(&dev_priv->gpu_error.hangcheck_timer,
				  round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES));
		}
		if (was_empty) {
@@ -3803,7 +3803,7 @@ i915_gem_idle(struct drm_device *dev)
	 * And not confound mm.suspended!
	 */
	dev_priv->mm.suspended = 1;
	del_timer_sync(&dev_priv->hangcheck_timer);
	del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);

	i915_kernel_lost_context(dev);
	i915_gem_cleanup_ringbuffer(dev);
@@ -4064,7 +4064,7 @@ i915_gem_load(struct drm_device *dev)
		INIT_LIST_HEAD(&dev_priv->fence_regs[i].lru_list);
	INIT_DELAYED_WORK(&dev_priv->mm.retire_work,
			  i915_gem_retire_work_handler);
	init_completion(&dev_priv->error_completion);
	init_completion(&dev_priv->gpu_error.completion);

	/* On GEN3 we really need to make sure the ARB C3 LP bit is set */
	if (IS_GEN3(dev)) {
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