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Commit 98a47a04 authored by Neeraj Upadhyay's avatar Neeraj Upadhyay
Browse files

msm: Back merge rel to dev for SDM660/SDM630 renaming 



Change-Id: Idd3880bb1570fac9a6f4f4008a1ca48384f8e3a4
Signed-off-by: default avatarNeeraj Upadhyay <neeraju@codeaurora.org>
parents 55e8426a 33eba0ae

Documentation/devicetree/bindings/arm/msm/msm.txt

+14 −14
Original line number Diff line number Diff line
@@ -89,14 +89,14 @@ SoCs: 
- MSMHAMSTER

  compatible = "qcom,msmhamster"



- MSMFALCON

  compatible = "qcom,msmfalcon"

- SDM660

  compatible = "qcom,sdm660"



- APQFALCON

  compatible = "qcom,apqfalcon"

- SDA660

  compatible = "qcom,sda660"



- MSMTRITON

  compatible = "qcom,msmtriton"

- SDM630

  compatible = "qcom,sdm630"



- MSM8952

  compatible = "qcom,msm8952"
@@ -263,14 +263,14 @@ compatible = "qcom,msm8998-qrd" 
compatible = "qcom,msmhamster-rumi"

compatible = "qcom,msmhamster-cdp"

compatible = "qcom,msmhamster-mtp"

compatible = "qcom,msmfalcon-sim"

compatible = "qcom,msmfalcon-rumi"

compatible = "qcom,msmfalcon-cdp"

compatible = "qcom,msmfalcon-mtp"

compatible = "qcom,msmfalcon-qrd"

compatible = "qcom,apqfalcon-mtp"

compatible = "qcom,apqfalcon-cdp"

compatible = "qcom,msmtriton-rumi"

compatible = "qcom,sdm660-sim"

compatible = "qcom,sdm660-rumi"

compatible = "qcom,sdm660-cdp"

compatible = "qcom,sdm660-mtp"

compatible = "qcom,sdm660-qrd"

compatible = "qcom,sda660-mtp"

compatible = "qcom,sda660-cdp"

compatible = "qcom,sdm630-rumi"

compatible = "qcom,msm8952-rumi"

compatible = "qcom,msm8952-sim"

compatible = "qcom,msm8952-qrd"

Documentation/devicetree/bindings/clock/qcom,gcc-dbg.txt

+3 −3
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@ Qualcomm Technologies Inc Global Clock Debug Controller Binding 


Required properties :

- compatible:	shall contain the following:

			"qcom,gcc-debug-msmfalcon"

			"qcom,gcc-debug-sdm660"



- reg:		shall contain global clock controller

	        base register offset location and length.
@@ -24,7 +24,7 @@ In the case where "qcom,cc-count" is > 1, the below needs to be defined. 


Example:

	clock_gcc: clock-controller@100000 {

		compatible = "qcom,gcc-msmfalcon", "syscon";

		compatible = "qcom,gcc-sdm660", "syscon";

		....

	};
@@ -44,7 +44,7 @@ Example: 
	};



	clock_debug: qcom,cc-debug@62000 {

		compatible = "qcom,gcc-debug-msmfalcon";

		compatible = "qcom,gcc-debug-sdm660";

		reg = <0x62000 0x4>;

		reg-names = "cc_offset";

		clocks = <&clock_rpmcc  RPM_XO_CLK_SRC>;

Documentation/devicetree/bindings/clock/qcom,gcc.txt

+1 −1
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ Required properties : 
			"qcom,gcc-msm8974pro"

			"qcom,gcc-msm8974pro-ac"

			"qcom,gcc-msm8996"

			"qcom,gcc-msmfalcon"

			"qcom,gcc-sdm660"



- reg : shall contain base register location and length

- #clock-cells : shall contain 1

Documentation/devicetree/bindings/clock/qcom,gpucc.txt

+3 −3
Original line number Diff line number Diff line
@@ -4,8 +4,8 @@ Qualcomm Technologies, Inc Graphics Clock & Reset Controller Binding 
Required properties :

- compatible : shall contain only one of the following:



			"qcom,gpucc-msmfalcon",

			"qcom,gpucc-msmtriton"

			"qcom,gpucc-sdm660",

			"qcom,gpucc-sdm630"



- reg : shall contain base register location and length

- #clock-cells : shall contain 1
@@ -16,7 +16,7 @@ Optional properties : 


Example:

	clock-controller@4000000 {

		compatible = "qcom,gpucc-msmfalcon";

		compatible = "qcom,gpucc-sdm660";

		reg = <<0x5065000 0x10000>;

		#clock-cells = <1>;

		#reset-cells = <1>;

Documentation/devicetree/bindings/clock/qcom,mmcc.txt

+1 −1
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ Required properties : 
			"qcom,mmcc-msm8960"

			"qcom,mmcc-msm8974"

			"qcom,mmcc-msm8996"

			"qcom,mmcc-msmfalcon"

			"qcom,mmcc-sdm660"



- reg : shall contain base register location and length

- #clock-cells : shall contain 1