Loading arch/arm/boot/dts/qcom/msmfalcon.dtsi +39 −0 Original line number Diff line number Diff line Loading @@ -265,6 +265,13 @@ qcom,summing-threshold = <0x10>; }; restart@10ac000 { compatible = "qcom,pshold"; reg = <0x10ac000 0x4>, <0x1fd3000 0x4>; reg-names = "pshold-base", "tcsr-boot-misc-detect"; }; spmi_bus: qcom,spmi@800f000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x800f000 0x1000>, Loading Loading @@ -890,6 +897,17 @@ status = "ok"; }; qcom,msm-rtb { compatible = "qcom,msm-rtb"; qcom,rtb-size = <0x100000>; }; qcom,mpm2-sleep-counter@10a3000 { compatible = "qcom,mpm2-sleep-counter"; reg = <0x10a3000 0x1000>; clock-frequency = <32768>; }; qcom,msm-imem@146bf000 { compatible = "qcom,msm-imem"; reg = <0x146bf000 0x1000>; Loading @@ -897,6 +915,21 @@ #address-cells = <1>; #size-cells = <1>; dload_type@18 { compatible = "qcom,msm-imem-dload-type"; reg = <0x18 4>; }; restart_reason@65c { compatible = "qcom,msm-imem-restart_reason"; reg = <0x65c 4>; }; boot_stats@6b0 { compatible = "qcom,msm-imem-boot_stats"; reg = <0x6b0 32>; }; pil@94c { compatible = "qcom,msm-imem-pil"; reg = <0x94c 200>; Loading @@ -919,6 +952,12 @@ clock-names = "atb_clk"; clocks = <&clock_rpmcc RPM_QDSS_CLK>; }; cpu_pmu: cpu-pmu { compatible = "arm,armv8-pmuv3"; qcom,irq-is-percpu; interrupts = <1 6 4>; }; }; #include "msmfalcon-ion.dtsi" Loading arch/arm/boot/dts/qcom/msmtriton.dtsi +34 −0 Original line number Diff line number Diff line Loading @@ -241,6 +241,13 @@ clock-frequency = <19200000>; }; restart@10ac000 { compatible = "qcom,pshold"; reg = <0x10ac000 0x4>, <0x1fd3000 0x4>; reg-names = "pshold-base", "tcsr-boot-misc-detect"; }; qcom,sps { compatible = "qcom,msm_sps_4k"; qcom,pipe-attr-ee; Loading Loading @@ -711,6 +718,12 @@ status = "ok"; }; qcom,mpm2-sleep-counter@10a3000 { compatible = "qcom,mpm2-sleep-counter"; reg = <0x10a3000 0x1000>; clock-frequency = <32768>; }; qcom,msm-imem@146bf000 { compatible = "qcom,msm-imem"; reg = <0x146bf000 0x1000>; Loading @@ -718,6 +731,21 @@ #address-cells = <1>; #size-cells = <1>; dload_type@18 { compatible = "qcom,msm-imem-dload-type"; reg = <0x18 4>; }; restart_reason@65c { compatible = "qcom,msm-imem-restart_reason"; reg = <0x65c 4>; }; boot_stats@6b0 { compatible = "qcom,msm-imem-boot_stats"; reg = <0x6b0 32>; }; pil@94c { compatible = "qcom,msm-imem-pil"; reg = <0x94c 200>; Loading @@ -740,6 +768,12 @@ clock-names = "atb_clk"; clocks = <&clock_rpmcc RPM_QDSS_CLK>; }; cpu_pmu: cpu-pmu { compatible = "arm,armv8-pmuv3"; qcom,irq-is-percpu; interrupts = <1 6 4>; }; }; #include "msmtriton-ion.dtsi" Loading Loading
arch/arm/boot/dts/qcom/msmfalcon.dtsi +39 −0 Original line number Diff line number Diff line Loading @@ -265,6 +265,13 @@ qcom,summing-threshold = <0x10>; }; restart@10ac000 { compatible = "qcom,pshold"; reg = <0x10ac000 0x4>, <0x1fd3000 0x4>; reg-names = "pshold-base", "tcsr-boot-misc-detect"; }; spmi_bus: qcom,spmi@800f000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x800f000 0x1000>, Loading Loading @@ -890,6 +897,17 @@ status = "ok"; }; qcom,msm-rtb { compatible = "qcom,msm-rtb"; qcom,rtb-size = <0x100000>; }; qcom,mpm2-sleep-counter@10a3000 { compatible = "qcom,mpm2-sleep-counter"; reg = <0x10a3000 0x1000>; clock-frequency = <32768>; }; qcom,msm-imem@146bf000 { compatible = "qcom,msm-imem"; reg = <0x146bf000 0x1000>; Loading @@ -897,6 +915,21 @@ #address-cells = <1>; #size-cells = <1>; dload_type@18 { compatible = "qcom,msm-imem-dload-type"; reg = <0x18 4>; }; restart_reason@65c { compatible = "qcom,msm-imem-restart_reason"; reg = <0x65c 4>; }; boot_stats@6b0 { compatible = "qcom,msm-imem-boot_stats"; reg = <0x6b0 32>; }; pil@94c { compatible = "qcom,msm-imem-pil"; reg = <0x94c 200>; Loading @@ -919,6 +952,12 @@ clock-names = "atb_clk"; clocks = <&clock_rpmcc RPM_QDSS_CLK>; }; cpu_pmu: cpu-pmu { compatible = "arm,armv8-pmuv3"; qcom,irq-is-percpu; interrupts = <1 6 4>; }; }; #include "msmfalcon-ion.dtsi" Loading
arch/arm/boot/dts/qcom/msmtriton.dtsi +34 −0 Original line number Diff line number Diff line Loading @@ -241,6 +241,13 @@ clock-frequency = <19200000>; }; restart@10ac000 { compatible = "qcom,pshold"; reg = <0x10ac000 0x4>, <0x1fd3000 0x4>; reg-names = "pshold-base", "tcsr-boot-misc-detect"; }; qcom,sps { compatible = "qcom,msm_sps_4k"; qcom,pipe-attr-ee; Loading Loading @@ -711,6 +718,12 @@ status = "ok"; }; qcom,mpm2-sleep-counter@10a3000 { compatible = "qcom,mpm2-sleep-counter"; reg = <0x10a3000 0x1000>; clock-frequency = <32768>; }; qcom,msm-imem@146bf000 { compatible = "qcom,msm-imem"; reg = <0x146bf000 0x1000>; Loading @@ -718,6 +731,21 @@ #address-cells = <1>; #size-cells = <1>; dload_type@18 { compatible = "qcom,msm-imem-dload-type"; reg = <0x18 4>; }; restart_reason@65c { compatible = "qcom,msm-imem-restart_reason"; reg = <0x65c 4>; }; boot_stats@6b0 { compatible = "qcom,msm-imem-boot_stats"; reg = <0x6b0 32>; }; pil@94c { compatible = "qcom,msm-imem-pil"; reg = <0x94c 200>; Loading @@ -740,6 +768,12 @@ clock-names = "atb_clk"; clocks = <&clock_rpmcc RPM_QDSS_CLK>; }; cpu_pmu: cpu-pmu { compatible = "arm,armv8-pmuv3"; qcom,irq-is-percpu; interrupts = <1 6 4>; }; }; #include "msmtriton-ion.dtsi" Loading