Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 9709da82 authored by Linux Build Service Account's avatar Linux Build Service Account
Browse files

Merge cac1fc5e on remote branch 

Change-Id: Icb91ef04dc5c341ca0eef488dffb0f75d8cccbe8
parents 825c6d10 cac1fc5e

fw/htt.h

+175 −13
Original line number Diff line number Diff line
@@ -175,9 +175,11 @@ 
 * 3.58 Add optional MSDU ack RSSI array to end of HTT_T2H TX_COMPL_IND msg

 * 3.59 Add HTT_RXDMA_HOST_BUF_RING2 def

 * 3.60 Add HTT_T2H_MSG_TYPE_PEER_STATS_IND def

 * 3.61 Add rx offset fields to HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG msg

 * 3.62 Add antenna mask to reserved space in htt_rx_ind_hl_rx_desc_t

 */

#define HTT_CURRENT_VERSION_MAJOR 3

#define HTT_CURRENT_VERSION_MINOR 60

#define HTT_CURRENT_VERSION_MINOR 62









#define HTT_NUM_TX_FRAG_DESC  1024
















@@ -4728,9 +4730,9 @@ enum htt_srng_ring_id {







 *









 *    The message would appear as follows:









 *









 *    |31       26|25|24|23            16|15             8|7             0|









 *    |31    27|26|25|24|23            16|15             8|7             0|









 *    |-----------------+----------------+----------------+---------------|









 *    |   rsvd1   |PS|SS|     ring_id    |     pdev_id    |    msg_type   |









 *    |  rsvd1 |OV|PS|SS|     ring_id    |     pdev_id    |    msg_type   |









 *    |-------------------------------------------------------------------|









 *    |              rsvd2               |           ring_buffer_size     |









 *    |-------------------------------------------------------------------|








@@ -4744,9 +4746,18 @@ enum htt_srng_ring_id {







 *    |-------------------------------------------------------------------|









 *    |                         tlv_filter_in_flags                       |









 *    |-------------------------------------------------------------------|









 *    |         rx_header_offset         |       rx_packet_offset         |









 *    |-------------------------------------------------------------------|









 *    |       rx_mpdu_start_offset       |      rx_mpdu_end_offset        |









 *    |-------------------------------------------------------------------|









 *    |       rx_msdu_start_offset       |      rx_msdu_end_offset        |









 *    |-------------------------------------------------------------------|









 *    |              rsvd3               |      rx_attention_offset       |









 *    |-------------------------------------------------------------------|









 * Where:









 *     PS = pkt_swap









 *     SS = status_swap









 *     OV = rx_offsets_valid









 * The message is interpreted as follows:









 * dword0 - b'0:7   - msg_type: This will be set to









 *                    HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG








@@ -4755,9 +4766,15 @@ enum htt_srng_ring_id {







 *                    1/2/3 mac id (for rings at LMAC level)









 *          b'16:23 - ring_id : Identify the ring to configure.









 *                    More details can be got from enum htt_srng_ring_id









 *          b'24    - status_swap: 1 is to swap status TLV









 *          b'25    - pkt_swap:  1 is to swap packet TLV









 *          b'26:31 - rsvd1:  reserved for future use









 *          b'24    - status_swap (SS): 1 is to swap status TLV - refer to









 *                    BUF_RING_CFG_0 defs within HW .h files,









 *                    e.g. wmac_top_reg_seq_hwioreg.h









 *          b'25    - pkt_swap (PS):  1 is to swap packet TLV - refer to









 *                    BUF_RING_CFG_0 defs within HW .h files,









 *                    e.g. wmac_top_reg_seq_hwioreg.h









 *          b'26    - rx_offset_valid (OV): flag to indicate rx offsets









 *                    configuration fields are valid









 *          b'27:31 - rsvd1:  reserved for future use









 * dword1 - b'0:16  - ring_buffer_size: size of bufferes referenced by rx ring,









 *                    in byte units.









 *                    Valid only for HW_TO_SW_RING and SW_TO_HW_RING








@@ -4786,6 +4803,42 @@ enum htt_srng_ring_id {







 * dword6 - b'0:31 -  tlv_filter_in_flags:









 *                    Filter in Attention/MPDU/PPDU/Header/User tlvs









 *                    Refer to CFG_TLV_FILTER_IN_FLAG defs









 * dword7 - b'0:15 -  rx_packet_offset: rx_packet_offset in byte units









 *                    Valid only for HW_TO_SW_RING and SW_TO_HW_RING









 *                    A value of 0 will be considered as ignore this config.









 *                    Refer to BUF_RING_CFG_1 defs within HW .h files,









 *                    e.g. wmac_top_reg_seq_hwioreg.h









 *        - b'16:31 - rx_header_offset: rx_header_offset in byte units









 *                    Valid only for HW_TO_SW_RING and SW_TO_HW_RING









 *                    A value of 0 will be considered as ignore this config.









 *                    Refer to BUF_RING_CFG_1 defs within HW .h files,









 *                    e.g. wmac_top_reg_seq_hwioreg.h









 * dword8 - b'0:15 -  rx_mpdu_end_offset: rx_mpdu_end_offset in byte units









 *                    Valid only for HW_TO_SW_RING and SW_TO_HW_RING









 *                    A value of 0 will be considered as ignore this config.









 *                    Refer to BUF_RING_CFG_2 defs within HW .h files,









 *                    e.g. wmac_top_reg_seq_hwioreg.h









 *        - b'16:31 - rx_mpdu_start_offset: rx_mpdu_start_offset in byte units









 *                    Valid only for HW_TO_SW_RING and SW_TO_HW_RING









 *                    A value of 0 will be considered as ignore this config.









 *                    Refer to BUF_RING_CFG_2 defs within HW .h files,









 *                    e.g. wmac_top_reg_seq_hwioreg.h









 * dword9 - b'0:15 -  rx_msdu_end_offset: rx_msdu_end_offset in byte units









 *                    Valid only for HW_TO_SW_RING and SW_TO_HW_RING









 *                    A value of 0 will be considered as ignore this config.









 *                    Refer to BUF_RING_CFG_3 defs within HW .h files,









 *                    e.g. wmac_top_reg_seq_hwioreg.h









 *        - b'16:31 - rx_msdu_start_offset: rx_msdu_start_offset in byte units









 *                    Valid only for HW_TO_SW_RING and SW_TO_HW_RING









 *                    A value of 0 will be considered as ignore this config.









 *                    Refer to BUF_RING_CFG_3 defs within HW .h files,









 *                    e.g. wmac_top_reg_seq_hwioreg.h









 * dword10 - b'0:15 - rx_attention_offset: rx_attention_offset in byte units









 *                    Valid only for HW_TO_SW_RING and SW_TO_HW_RING









 *                    A value of 0 will be considered as ignore this config.









 *                    Refer to BUF_RING_CFG_4 defs within HW .h files,









 *                    e.g. wmac_top_reg_seq_hwioreg.h









 *        - b'16-31 - rsvd3 for future use









 */









PREPACK struct htt_rx_ring_selection_cfg_t {









    A_UINT32 msg_type:          8,








@@ -4793,7 +4846,8 @@ PREPACK struct htt_rx_ring_selection_cfg_t {







             ring_id:           8,









             status_swap:       1,









             pkt_swap:          1,









             rsvd1:       6;









             rx_offsets_valid:  1,









             rsvd1:             5;









    A_UINT32 ring_buffer_size: 16,









             rsvd2:            16;









    A_UINT32 packet_type_enable_flags_0;








@@ -4801,6 +4855,14 @@ PREPACK struct htt_rx_ring_selection_cfg_t {







    A_UINT32 packet_type_enable_flags_2;









    A_UINT32 packet_type_enable_flags_3;









    A_UINT32 tlv_filter_in_flags;









    A_UINT32 rx_packet_offset:     16,









             rx_header_offset:     16;









    A_UINT32 rx_mpdu_end_offset:   16,









             rx_mpdu_start_offset: 16;









    A_UINT32 rx_msdu_end_offset:   16,









             rx_msdu_start_offset: 16;









    A_UINT32 rx_attn_offset:       16,









             rsvd3:                16;









} POSTPACK;

















#define HTT_RX_RING_SELECTION_CFG_SZ    (sizeof(struct htt_rx_ring_selection_cfg_t))








@@ -4849,6 +4911,17 @@ PREPACK struct htt_rx_ring_selection_cfg_t {







                ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PKT_TLV_SWAP_S)); \









            } while (0)

















#define HTT_RX_RING_SELECTION_CFG_RX_OFFSETS_VALID_M           0x04000000









#define HTT_RX_RING_SELECTION_CFG_RX_OFFSETS_VALID_S           26









#define HTT_RX_RING_SELECTION_CFG_RX_OFFSETS_VALID_GET(_var) \









            (((_var) & HTT_RX_RING_SELECTION_CFG_RX_OFFSETS_VALID_M) >> \









                    HTT_RX_RING_SELECTION_CFG_RX_OFFSETS_VALID_S)









#define HTT_RX_RING_SELECTION_CFG_RX_OFFSETS_VALID_SET(_var, _val) \









            do { \









                HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_RX_OFFSETS_VALID, _val); \









                ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_RX_OFFSETS_VALID_S)); \









            } while (0)

















#define HTT_RX_RING_SELECTION_CFG_RING_BUFFER_SIZE_M           0x0000ffff









#define HTT_RX_RING_SELECTION_CFG_RING_BUFFER_SIZE_S           0









#define HTT_RX_RING_SELECTION_CFG_RING_BUFFER_SIZE_GET(_var) \








@@ -4915,6 +4988,83 @@ PREPACK struct htt_rx_ring_selection_cfg_t {







                ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_TLV_FILTER_IN_FLAG_S)); \









            } while (0)

















#define HTT_RX_RING_SELECTION_CFG_RX_PACKET_OFFSET_M         0x0000ffff









#define HTT_RX_RING_SELECTION_CFG_RX_PACKET_OFFSET_S         0









#define HTT_RX_RING_SELECTION_CFG_RX_PACKET_OFFSET_GET(_var) \









            (((_var) & HTT_RX_RING_SELECTION_CFG_RX_PACKET_OFFSET_M) >> \









                    HTT_RX_RING_SELECTION_CFG_RX_PACKET_OFFSET_S)









#define HTT_RX_RING_SELECTION_CFG_RX_PACKET_OFFSET_SET(_var, _val) \









            do { \









                HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_RX_PACKET_OFFSET, _val); \









                ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_RX_PACKET_OFFSET_S)); \









            } while (0)

















#define HTT_RX_RING_SELECTION_CFG_RX_HEADER_OFFSET_M         0xffff0000









#define HTT_RX_RING_SELECTION_CFG_RX_HEADER_OFFSET_S         16









#define HTT_RX_RING_SELECTION_CFG_RX_HEADER_OFFSET_GET(_var) \









            (((_var) & HTT_RX_RING_SELECTION_CFG_RX_HEADER_OFFSET_M) >> \









                    HTT_RX_RING_SELECTION_CFG_RX_HEADER_OFFSET_S)









#define HTT_RX_RING_SELECTION_CFG_RX_HEADER_OFFSET_SET(_var, _val) \









            do { \









                HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_RX_HEADER_OFFSET, _val); \









                ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_RX_HEADER_OFFSET_S)); \









            } while (0)

















#define HTT_RX_RING_SELECTION_CFG_RX_MPDU_END_OFFSET_M         0x0000ffff









#define HTT_RX_RING_SELECTION_CFG_RX_MPDU_END_OFFSET_S         0









#define HTT_RX_RING_SELECTION_CFG_RX_MPDU_END_OFFSET_GET(_var) \









            (((_var) & HTT_RX_RING_SELECTION_CFG_RX_MPDU_END_OFFSET_M) >> \









                    HTT_RX_RING_SELECTION_CFG_RX_MPDU_END_OFFSET_S)









#define HTT_RX_RING_SELECTION_CFG_RX_MPDU_END_OFFSET_SET(_var, _val) \









            do { \









                HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_RX_MPDU_END_OFFSET, _val); \









                ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_RX_MPDU_END_OFFSET_S)); \









            } while (0)

















#define HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_OFFSET_M         0xffff0000









#define HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_OFFSET_S         16









#define HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_OFFSET_GET(_var) \









            (((_var) & HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_OFFSET_M) >> \









                    HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_OFFSET_S)









#define HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_OFFSET_SET(_var, _val) \









            do { \









                HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_OFFSET, _val); \









                ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_OFFSET_S)); \









            } while (0)

















#define HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_OFFSET_M         0x0000ffff









#define HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_OFFSET_S         0









#define HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_OFFSET_GET(_var) \









            (((_var) & HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_OFFSET_M) >> \









                    HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_OFFSET_S)









#define HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_OFFSET_SET(_var, _val) \









            do { \









                HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_OFFSET, _val); \









                ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_OFFSET_S)); \









            } while (0)

















#define HTT_RX_RING_SELECTION_CFG_RX_MSDU_START_OFFSET_M         0xffff0000









#define HTT_RX_RING_SELECTION_CFG_RX_MSDU_START_OFFSET_S         16









#define HTT_RX_RING_SELECTION_CFG_RX_MSDU_START_OFFSET_GET(_var) \









            (((_var) & HTT_RX_RING_SELECTION_CFG_RX_MSDU_START_OFFSET_M) >> \









                    HTT_RX_RING_SELECTION_CFG_RX_MSDU_START_OFFSET_S)









#define HTT_RX_RING_SELECTION_CFG_RX_MSDU_START_OFFSET_SET(_var, _val) \









            do { \









                HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_RX_MSDU_START_OFFSET, _val); \









                ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_RX_MSDU_START_OFFSET_S)); \









            } while (0)

















#define HTT_RX_RING_SELECTION_CFG_RX_ATTENTION_OFFSET_M         0x0000ffff









#define HTT_RX_RING_SELECTION_CFG_RX_ATTENTION_OFFSET_S         0









#define HTT_RX_RING_SELECTION_CFG_RX_ATTENTION_OFFSET_GET(_var) \









            (((_var) & HTT_RX_RING_SELECTION_CFG_RX_ATTENTION_OFFSET_M) >> \









                    HTT_RX_RING_SELECTION_CFG_RX_ATTENTION_OFFSET_S)









#define HTT_RX_RING_SELECTION_CFG_RX_ATTENTION_OFFSET_SET(_var, _val) \









            do { \









                HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_RX_ATTENTION_OFFSET, _val); \









                ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_RX_ATTENTION_OFFSET_S)); \









            } while (0)

















/*









 * Subtype based MGMT frames enable bits.









 * FP: Filter_Pass, MD: Monitor_Direct MO: Monitor_Other








@@ -6781,7 +6931,7 @@ A_COMPILE_TIME_ASSERT(HTT_RX_IND_hdr_size_quantum,















#define HTT_RX_IND_HL_BYTES                               \









    (HTT_RX_IND_HDR_BYTES +                               \









     4 /* single FW rx MSDU descriptor, plus padding */ + \









     4 /* single FW rx MSDU descriptor */ + \









     4 /* single MPDU range information element */)









#define HTT_RX_IND_HL_SIZE32 (HTT_RX_IND_HL_BYTES >> 2)
















@@ -6818,6 +6968,14 @@ struct htt_rx_ind_hl_rx_desc_t {







            udp: 1,









            reserved: 1;









    } flags;









    /* sa_ant_matrix









     * For cases where a single rx chain has options to be connected to









     * different rx antennas, show which rx antennas were in use during









     * receipt of a given PPDU.









     * This sa_ant_matrix provides a bitmask of the antennas used while









     * receiving this frame.









     */









    A_UINT8 sa_ant_matrix;









};

















#define HTT_RX_IND_HL_RX_DESC_VER_OFFSET \








@@ -6833,6 +6991,10 @@ struct htt_rx_ind_hl_rx_desc_t {







    (HTT_RX_IND_HL_RX_DESC_BASE_OFFSET \









     + offsetof(struct htt_rx_ind_hl_rx_desc_t, flags))

















#define HTT_RX_IND_HL_SA_ANT_MATRIX_OFFSET \









    (HTT_RX_IND_HL_RX_DESC_BASE_OFFSET \









     + offsetof(struct htt_rx_ind_hl_rx_desc_t, sa_ant_matrix))

















#define HTT_RX_IND_HL_FLAG_FIRST_MSDU   (0x01 << 0)









#define HTT_RX_IND_HL_FLAG_LAST_MSDU    (0x01 << 1)









#define HTT_RX_IND_HL_FLAG_C3_FAILED    (0x01 << 2) /* L3 checksum failed */
































fw/htt_stats.h



+978
−960






























Original line number
Diff line number
Diff line







@@ -35,7 +35,6 @@







 *    Max supported stats :- 256.









 */









enum htt_dbg_ext_stats_type {



















    /* HTT_DBG_EXT_STATS_RESET









     * PARAM:









     *   - config_param0 : start_offset (stats type)








@@ -268,7 +267,6 @@ enum htt_dbg_ext_stats_type {







     */









    HTT_DBG_EXT_STATS_PDEV_OBSS_PD_STATS = 23,





























    /* keep this last */









    HTT_DBG_NUM_EXT_STATS = 256,









};








@@ -367,7 +365,6 @@ typedef enum {







    HTT_STATS_MAX_TAG,









} htt_tlv_tag_t;





























#define HTT_STATS_TLV_TAG_M 0x00000fff









#define HTT_STATS_TLV_TAG_S 0









#define HTT_STATS_TLV_LENGTH_M 0x00fff000








@@ -446,7 +443,6 @@ typedef struct {







    A_UINT32      data[1]; /* Can be variable length */









} htt_stats_string_tlv;





























#define HTT_TX_PDEV_STATS_CMN_MAC_ID_M 0x000000ff









#define HTT_TX_PDEV_STATS_CMN_MAC_ID_S 0


















@@ -460,7 +456,6 @@ typedef struct {







        ((_var) |= ((_val) << HTT_TX_PDEV_STATS_CMN_MAC_ID_S)); \









    } while (0)





























/* == TX PDEV STATS == */









typedef struct {









    htt_tlv_hdr_t tlv_hdr;








@@ -575,6 +570,8 @@ typedef struct {

















    A_UINT32 tx_active_dur_us_low;









    A_UINT32 tx_active_dur_us_high;









    /* Number of MPDUs dropped after max retries */









    A_UINT32 remove_mpdus_max_retries;









} htt_tx_pdev_stats_cmn_tlv;



















#define HTT_TX_PDEV_STATS_URRN_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))








@@ -687,7 +684,6 @@ typedef struct {







    A_UINT32 count;









} htt_hw_stats_wd_timeout_tlv;





























#define HTT_HW_STATS_PDEV_ERRS_MAC_ID_M 0x000000ff









#define HTT_HW_STATS_PDEV_ERRS_MAC_ID_S 0


















@@ -701,7 +697,6 @@ typedef struct {







        ((_var) |= ((_val) << HTT_HW_STATS_PDEV_ERRS_MAC_ID_S)); \









    } while (0)





























typedef struct {









    htt_tlv_hdr_t tlv_hdr;


















@@ -719,6 +714,20 @@ typedef struct {







    A_UINT32 tx_glb_reset;









    A_UINT32 tx_txq_reset;









    A_UINT32 rx_timeout_reset;









    A_UINT32 mac_cold_reset_restore_cal;









    A_UINT32 mac_cold_reset;









    A_UINT32 mac_warm_reset;









    A_UINT32 mac_only_reset;









    A_UINT32 phy_warm_reset;









    A_UINT32 phy_warm_reset_ucode_trig;









    A_UINT32 mac_warm_reset_restore_cal;









    A_UINT32 mac_sfm_reset;









    A_UINT32 phy_warm_reset_m3_ssr;









    A_UINT32 phy_warm_reset_reason_phy_m3;









    A_UINT32 phy_warm_reset_reason_tx_hw_stuck;









    A_UINT32 phy_warm_reset_reason_num_cca_rx_frame_stuck;









    A_UINT32 phy_warm_reset_reason_wal_rx_recovery_rst_rx_busy;









    A_UINT32 phy_warm_reset_reason_wal_rx_recovery_rst_mac_hang;









} htt_hw_stats_pdev_errs_tlv;



















typedef struct {








@@ -800,6 +809,7 @@ typedef struct _htt_pdev_err_stats {

















typedef struct _htt_msdu_flow_stats_tlv {









    htt_tlv_hdr_t tlv_hdr;



















    A_UINT32 last_update_timestamp;









    A_UINT32 last_add_timestamp;









    A_UINT32 last_remove_timestamp;








@@ -839,7 +849,6 @@ typedef struct _htt_msdu_flow_stats_tlv {







        ((_var) |= ((_val) << HTT_TX_TID_STATS_SW_PEER_ID_S)); \









    } while (0)





























#define HTT_TX_TID_STATS_TID_NUM_GET(_var) \









    (((_var) & HTT_TX_TID_STATS_TID_NUM_M) >> \









     HTT_TX_TID_STATS_TID_NUM_S)








@@ -866,7 +875,6 @@ typedef struct _htt_msdu_flow_stats_tlv {







        ((_var) |= ((_val) << HTT_TX_TID_STATS_NUM_SCHED_PENDING_S)); \









    } while (0)





























#define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_GET(_var) \









    (((_var) & HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_M) >> \









     HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S)








@@ -877,10 +885,10 @@ typedef struct _htt_msdu_flow_stats_tlv {







        ((_var) |= ((_val) << HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S)); \









    } while (0)





























/* Tidq stats */









typedef struct _htt_tx_tid_stats_tlv {









    htt_tlv_hdr_t tlv_hdr;



















    /* Stored as little endian */









    A_UINT8 tid_name[MAX_HTT_TID_NAME];









    /* BIT [15 :  0]   :- sw_peer_id








@@ -962,7 +970,6 @@ typedef struct _htt_tx_tid_stats_v1_tlv {







        ((_var) |= ((_val) << HTT_RX_TID_STATS_SW_PEER_ID_S)); \









    } while (0)





























#define HTT_RX_TID_STATS_TID_NUM_GET(_var) \









    (((_var) & HTT_RX_TID_STATS_TID_NUM_M) >> \









     HTT_RX_TID_STATS_TID_NUM_S)








@@ -975,6 +982,7 @@ typedef struct _htt_tx_tid_stats_v1_tlv {

















typedef struct _htt_rx_tid_stats_tlv {









    htt_tlv_hdr_t tlv_hdr;



















    /* BIT [15 : 0] : sw_peer_id









     * BIT [31 : 16] : tid_num









     */








@@ -1000,7 +1008,6 @@ typedef struct {







    A_UINT32 count;









} htt_counter_tlv;





























typedef struct {









    htt_tlv_hdr_t tlv_hdr;









    /* Number of rx ppdu. */








@@ -1038,6 +1045,8 @@ typedef struct {







     * If the peer is currently active, this inactive_time will be 0x0.









     */









    A_UINT32 inactive_time;









    /* Number of MPDUs dropped after max retries */









    A_UINT32 remove_mpdus_max_retries;









} htt_peer_stats_cmn_tlv;



















typedef struct {








@@ -1097,7 +1106,6 @@ typedef struct _htt_tx_peer_rate_stats_tlv {

















    /* Counters to track packets in dcm mcs (MCS 0, 1, 3, 4) */









    A_UINT32 tx_dcm[HTT_TX_PEER_STATS_NUM_DCM_COUNTERS];



















} htt_tx_peer_rate_stats_tlv;



















#define HTT_RX_PEER_STATS_NUM_MCS_COUNTERS 12








@@ -1144,6 +1152,7 @@ typedef struct _htt_rx_peer_rate_stats_tlv {







     * BIT [31 : 8]   :- Reserved









     */









    A_UINT32 per_chain_rssi_pkt_type;









    A_INT8   rx_per_chain_rssi_in_dbm[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_COUNTERS];









} htt_rx_peer_rate_stats_tlv;



















typedef enum {








@@ -1184,7 +1193,6 @@ typedef enum {







    (((_var) & HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_M) >> \









     HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S)





























#define HTT_DBG_EXT_STATS_PEER_REQ_MODE_GET(_var) \









    (((_var) & HTT_DBG_EXT_STATS_PEER_REQ_MODE_M) >> \









     HTT_DBG_EXT_STATS_PEER_REQ_MODE_S)








@@ -1220,6 +1228,7 @@ typedef enum {







 */









typedef struct _htt_peer_stats {









    htt_peer_stats_cmn_tlv cmn_tlv;



















    htt_peer_details_tlv peer_details;









    /* from g_rate_info_stats */









    htt_tx_peer_rate_stats_tlv tx_rate;








@@ -1244,7 +1253,6 @@ typedef struct {







    htt_peer_details_tlv peer_details[1];









} htt_active_peer_details_list_t;





























/* =========== MUMIMO HWQ stats =========== */



















/* MU MIMO stats per hwQ */








@@ -1294,6 +1302,7 @@ typedef struct {

















typedef struct {









    htt_tlv_hdr_t tlv_hdr;



















    /* BIT [ 7 :  0]   :- mac_id









     * BIT [15 :  8]   :- hwq_id









     * BIT [31 : 16]   :- reserved








@@ -1342,6 +1351,7 @@ typedef struct {

















typedef struct {









    htt_tlv_hdr_t tlv_hdr;



















    /* BIT [ 7 :  0]   :- mac_id









     * BIT [15 :  8]   :- hwq_id









     * BIT [31 : 16]   :- reserved








@@ -1548,6 +1558,7 @@ typedef struct {







    A_UINT32 ax_bsr_trigger;









    A_UINT32 ax_mu_bar_trigger;









    A_UINT32 ax_mu_rts_trigger;









    A_UINT32 ax_ulmumimo_trigger;









} htt_tx_selfgen_ax_stats_tlv;



















typedef struct {








@@ -1580,6 +1591,7 @@ typedef struct {







    A_UINT32 ax_bsr_trigger_err;









    A_UINT32 ax_mu_bar_trigger_err;









    A_UINT32 ax_mu_rts_trigger_err;









    A_UINT32 ax_ulmumimo_trigger_err;









} htt_tx_selfgen_ax_err_stats_tlv;



















/* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SELFGEN_INFO








@@ -1855,6 +1867,7 @@ typedef struct {

















typedef struct {









    htt_tlv_hdr_t tlv_hdr;



















    /* BIT [ 7 :  0]   :- mac_id









     * BIT [31 :  8]   :- reserved









     */








@@ -1887,7 +1900,6 @@ typedef struct {







    } txq[1];









} htt_stats_tx_sched_t;





























/* == TQM STATS == */



















#define HTT_TX_TQM_MAX_GEN_MPDU_END_REASON 16








@@ -2223,6 +2235,7 @@ typedef struct {







 */









typedef struct {









    htt_tlv_hdr_t tlv_hdr;



















    A_UINT32 fw2wbm_ring_full_hist[1];









} htt_tx_de_fw2wbm_ring_full_hist_tlv;


















@@ -2379,12 +2392,12 @@ typedef struct {







        ((_var) |= ((_val) << HTT_RING_IF_STATS_HWM_THRESHOLD_S)); \









    } while (0)





























#define HTT_STATS_LOW_WM_BINS 5









#define HTT_STATS_HIGH_WM_BINS 5



















typedef struct {









    A_UINT32 base_addr; /* DWORD aligned base memory address of the ring */



















    A_UINT32 elem_size; /* size of each ring element */



















    /* BIT [15 :  0]   :- num_elems








@@ -2696,7 +2709,6 @@ typedef struct {







        ((_var) |= ((_val) << HTT_SRING_STATS_INTERNAL_TP_S)); \









    } while (0)





























typedef struct {









    htt_tlv_hdr_t tlv_hdr;


















@@ -2761,7 +2773,6 @@ typedef struct {







    } r[1];









} htt_sring_stats_t;





























/* == PDEV TX RATE CTRL STATS == */



















#define HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS 12








@@ -2773,6 +2784,7 @@ typedef struct {







#define HTT_TX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4









#define HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8









#define HTT_TX_PDEV_STATS_NUM_LTF 4









#define HTT_TX_PDEV_STATS_NUM_11AX_TRIGGER_TYPES 6









#define HTT_TX_NUM_OF_SOUNDING_STATS_WORDS \









    (HTT_TX_PDEV_STATS_NUM_BW_COUNTERS * \









     HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS)








@@ -2864,6 +2876,7 @@ typedef struct {







    A_UINT32 ac_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];









    A_UINT32 ax_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];









    A_UINT32 ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];









    A_UINT32 trigger_type_11ax[HTT_TX_PDEV_STATS_NUM_11AX_TRIGGER_TYPES];









} htt_tx_pdev_rate_stats_tlv;



















/* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_RATE








@@ -2878,7 +2891,6 @@ typedef struct {







    htt_tx_pdev_rate_stats_tlv rate_tlv;









} htt_tx_pdev_rate_stats_t;





























/* == PDEV RX RATE CTRL STATS == */



















#define HTT_RX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4








@@ -2891,6 +2903,7 @@ typedef struct {







#define HTT_RX_PDEV_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT









#define HTT_RX_PDEV_MAX_OFDMA_NUM_USER 8









#define HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS 16









#define HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS 6



















#define HTT_RX_PDEV_RATE_STATS_MAC_ID_M 0x000000ff









#define HTT_RX_PDEV_RATE_STATS_MAC_ID_S 0








@@ -2905,9 +2918,9 @@ typedef struct {







        ((_var) |= ((_val) << HTT_RX_PDEV_RATE_STATS_MAC_ID_S)); \









    } while (0)





























typedef struct {









    htt_tlv_hdr_t tlv_hdr;



















    /* BIT [ 7 :  0]   :- mac_id









     * BIT [31 :  8]   :- reserved









     */








@@ -2978,9 +2991,16 @@ typedef struct {







     * BIT [31 : 8]   :- Reserved









     */









    A_UINT32 per_chain_rssi_pkt_type;









    A_INT8   rx_per_chain_rssi_in_dbm[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];









    A_UINT32 rx_su_ndpa;









    A_UINT32 rx_11ax_su_txbf_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];









    A_UINT32 rx_mu_ndpa;









    A_UINT32 rx_11ax_mu_txbf_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];









    A_UINT32 rx_br_poll;









    A_UINT32 rx_11ax_dl_ofdma_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];









    A_UINT32 rx_11ax_dl_ofdma_ru[HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS];









} htt_rx_pdev_rate_stats_tlv;





























/* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX_RATE









 * TLV_TAGS:









 *      - HTT_STATS_RX_PDEV_RATE_STATS_TAG








@@ -2993,7 +3013,6 @@ typedef struct {







    htt_rx_pdev_rate_stats_tlv rate_tlv;









} htt_rx_pdev_rate_stats_t;





























/* == RX PDEV/SOC STATS == */



















typedef struct {








@@ -3034,7 +3053,6 @@ typedef struct {







    A_UINT32 refill_ring_empty_cnt[1]; /* HTT_RX_STATS_REFILL_MAX_RING */









} htt_rx_soc_fw_refill_ring_empty_tlv_v;





























#define HTT_RX_SOC_FW_REFILL_RING_EMPTY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))



















/* NOTE: Variable length TLV, use length spec to infer array size */
































fw/wlan_defs.h



+2
−0






























Original line number
Diff line number
Diff line







@@ -115,6 +115,8 @@







#define HE_PET_8_USEC            1









#define HE_PET_16_USEC           2



















#define DEFAULT_OFDMA_RU26_COUNT 0



















typedef enum {









    MODE_11A        = 0,   /* 11a Mode */









    MODE_11G        = 1,   /* 11b/g Mode */
































fw/wmi_services.h



+10
−0






























Original line number
Diff line number
Diff line







@@ -379,6 +379,16 @@ typedef  enum  {







    WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, /* Extended Peer Tid configuration support for QoS related settings */









    WMI_SERVICE_WPA3_FT_SAE_SUPPORT = 195, /* FW roaming support for WPA3_FT_SAE */









    WMI_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, /* FW roaming support for WPA3_FT_SUITE_B */









    WMI_SERVICE_VOW_ENABLE=197, /* FW supports a set of features to optimize VoW performance */









    WMI_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, /* support WMI_PEER_CFR_CAPTURE_EVENT msg */









    WMI_SERVICE_BROADCAST_TWT = 199,  /* support of Broadcast TWT (Target Wake Time) for STA/AP */









    WMI_SERVICE_RAP_DETECTION_SUPPORT = 200, /* indicate FW supports rogue AP detection */









    WMI_SERVICE_PS_TDCC = 201, /* FW support tx_duty_cycle_control powersave */









    WMI_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY   = 202, /* BTCOEX Three-way CoEx Config Legacy Feature support */









    WMI_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, /* BTCOEX Three-way CoEx Config Override Feature support */









    WMI_SERVICE_TX_PWR_PER_PEER = 204, /* target supports per-peer tx pwr spec via WMI_PEER_USE_FIXED_PWR */









    WMI_SERVICE_STA_PLUS_STA_SUPPORT = 205, /* indicates target supports STA + STA concurrency */









    WMI_SERVICE_WPA3_FT_FILS = 206,





























    /******* ADD NEW SERVICES HERE *******/
































fw/wmi_tlv_defs.h



+68
−2




























File changed.
Preview size limit exceeded, changes collapsed.