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Commit 959e16d6 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: fix up pch pll enabling for pixel multipliers 



We have a nice comment saying that the pixel multiplier only sticks
once the vco is on and stable. The only problem is that the enable bit
wasn't set at all. This patch fixes this and so brings the ilk+ pch
pll code in line with the i8xx/i9xx pll code. Or at least improves
matters a lot.

This should fix sdvo on ilk-ivb for low-res modes.

Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 66e985c0

drivers/gpu/drm/i915/intel_display.c

+2 −2
Original line number Diff line number Diff line
@@ -5660,7 +5660,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc, 
	else

		dpll |= PLL_REF_INPUT_DREFCLK;



	return dpll;

	return dpll | DPLL_VCO_ENABLE;

}



static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
@@ -5722,7 +5722,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, 
					     &fp, &reduced_clock,

					     has_reduced_clock ? &fp2 : NULL);



		intel_crtc->config.dpll_hw_state.dpll = dpll | DPLL_VCO_ENABLE;

		intel_crtc->config.dpll_hw_state.dpll = dpll;

		intel_crtc->config.dpll_hw_state.fp0 = fp;

		if (has_reduced_clock)

			intel_crtc->config.dpll_hw_state.fp1 = fp2;