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Commit 94903932 authored by Osvaldo Banuelos's avatar Osvaldo Banuelos
Browse files

ARM: dts: msm: define perf cluster speed-bin 1 OSM LUT for msmcobalt 



Add support for msmcobalt speed-bin 1 devices which can operate
with a performance cluster clock frequency of up to 2.208 GHz.

CRs-Fixed: 1057115
Change-Id: I2c733a1f0ee4baf978c3715aa3bd74a6b46ee6c2
Signed-off-by: default avatarOsvaldo Banuelos <osvaldob@codeaurora.org>
parent 436c553c

arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi

+28 −0
Original line number Diff line number Diff line
@@ -79,6 +79,34 @@ 
		<  2342400000 0x0404007a 0x0a620062 0x3 >,

		<  2419200000 0x0404007e 0x0a650065 0x3 >,

		<  2496000000 0x04040082 0x0a680068 0x3 >;



	qcom,perfcl-speedbin1-v0 =

		<   300000000 0x0004000f 0x01200020 0x1 >,

		<   345600000 0x05040012 0x01200020 0x1 >,

		<   422400000 0x05040016 0x02200020 0x1 >,

		<   499200000 0x0504001a 0x02200020 0x1 >,

		<   576000000 0x0504001e 0x02200020 0x1 >,

		<   652800000 0x05040022 0x03200020 0x1 >,

		<   729600000 0x05040026 0x03200020 0x1 >,

		<   806400000 0x0504002a 0x03220022 0x1 >,

		<   902400000 0x0404002f 0x04260026 0x1 >,

		<   979200000 0x04040033 0x04290029 0x1 >,

		<  1056000000 0x04040037 0x052c002c 0x1 >,

		<  1132800000 0x0404003b 0x052f002f 0x1 >,

		<  1190400000 0x0404003e 0x05320032 0x2 >,

		<  1267200000 0x04040042 0x06350035 0x2 >,

		<  1344000000 0x04040046 0x06380038 0x2 >,

		<  1420800000 0x0404004a 0x063b003b 0x2 >,

		<  1497600000 0x0404004e 0x073e003e 0x2 >,

		<  1574400000 0x04040052 0x07420042 0x2 >,

		<  1651200000 0x04040056 0x07450045 0x2 >,

		<  1728000000 0x0404005a 0x08480048 0x2 >,

		<  1804800000 0x0404005e 0x084b004b 0x2 >,

		<  1881600000 0x04040062 0x094e004e 0x2 >,

		<  1958400000 0x04040066 0x09520052 0x2 >,

		<  2035200000 0x0404006a 0x09550055 0x3 >,

		<  2112000000 0x0404006e 0x0a580058 0x3 >,

		<  2208000000 0x04040073 0x0a5c005c 0x3 >;

};



&msm_cpufreq {

arch/arm/boot/dts/qcom/msmcobalt.dtsi

+4 −3
Original line number Diff line number Diff line
@@ -802,12 +802,13 @@ 


	clock_cpu: qcom,cpu-clock-cobalt@179c0000 {

		compatible = "qcom,cpu-clock-osm";

		reg = <0x179C0000 0x4000>,

		reg = <0x179c0000 0x4000>,

		      <0x17916000 0x1000>,

		      <0x17816000 0x1000>,

		      <0x179D1000 0x1000>;

		      <0x179d1000 0x1000>,

		      <0x00784130 0x8>;

		reg-names = "osm", "pwrcl_pll", "perfcl_pll",

			    "apcs_common";

			    "apcs_common", "perfcl_efuse";



		vdd-pwrcl-supply = <&apc0_pwrcl_vreg>;

		vdd-perfcl-supply = <&apc1_perfcl_vreg>;