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Commit 94491685 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt
Browse files

powerpc: Shield code specific to 64-bit server processors 



This is a random collection of added ifdef's around portions of
code that only mak sense on server processors. Using either
CONFIG_PPC_STD_MMU_64 or CONFIG_PPC_BOOK3S as seems appropriate.

This is meant to make the future merging of Book3E 64-bit support
easier.

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 91c60b5b

arch/powerpc/include/asm/lppaca.h

+6 −0
Original line number Diff line number Diff line
@@ -20,6 +20,11 @@ 
#define _ASM_POWERPC_LPPACA_H

#ifdef __KERNEL__



/* These definitions relate to hypervisors that only exist when using

 * a server type processor

 */

#ifdef CONFIG_PPC_BOOK3S



//=============================================================================

//

//	This control block contains the data that is shared between the
@@ -158,5 +163,6 @@ struct slb_shadow { 


extern struct slb_shadow slb_shadow[];



#endif /* CONFIG_PPC_BOOK3S */

#endif /* __KERNEL__ */

#endif /* _ASM_POWERPC_LPPACA_H */

arch/powerpc/include/asm/mmu.h

+2 −2
Original line number Diff line number Diff line
@@ -74,10 +74,10 @@ extern void early_init_mmu_secondary(void); 
#endif /* !__ASSEMBLY__ */





#ifdef CONFIG_PPC64

#if defined(CONFIG_PPC_STD_MMU_64)

/* 64-bit classic hash table MMU */

#  include <asm/mmu-hash64.h>

#elif defined(CONFIG_PPC_STD_MMU)

#elif defined(CONFIG_PPC_STD_MMU_32)

/* 32-bit classic hash table MMU */

#  include <asm/mmu-hash32.h>

#elif defined(CONFIG_40x)

arch/powerpc/include/asm/pgtable-ppc64.h

+5 −0
Original line number Diff line number Diff line
@@ -31,9 +31,11 @@ 
#error TASK_SIZE_USER64 exceeds pagetable range

#endif



#ifdef CONFIG_PPC_STD_MMU_64

#if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT))

#error TASK_SIZE_USER64 exceeds user VSID range

#endif

#endif



/*

 * Define the address range of the vmalloc VM area.
@@ -199,8 +201,11 @@ static inline unsigned long pte_update(struct mm_struct *mm, 
	if (!huge)

		assert_pte_locked(mm, addr);



#ifdef CONFIG_PPC_STD_MMU_64

	if (old & _PAGE_HASHPTE)

		hpte_need_flush(mm, addr, ptep, old, huge);

#endif



	return old;

}

arch/powerpc/kernel/irq.c

+2 −0
Original line number Diff line number Diff line
@@ -117,6 +117,7 @@ notrace void raw_local_irq_restore(unsigned long en) 
	if (!en)

		return;



#ifdef CONFIG_PPC_STD_MMU_64

	if (firmware_has_feature(FW_FEATURE_ISERIES)) {

		/*

		 * Do we need to disable preemption here?  Not really: in the
@@ -134,6 +135,7 @@ notrace void raw_local_irq_restore(unsigned long en) 
		if (local_paca->lppaca_ptr->int_dword.any_int)

			iseries_handle_interrupts();

	}

#endif /* CONFIG_PPC_STD_MMU_64 */



	/*

	 * if (get_paca()->hard_enabled) return;

arch/powerpc/kernel/pci_64.c

+5 −0
Original line number Diff line number Diff line
@@ -420,6 +420,9 @@ int pcibios_unmap_io_space(struct pci_bus *bus) 
	 * so flushing the hash table is the only sane way to make sure

	 * that no hash entries are covering that removed bridge area

	 * while still allowing other busses overlapping those pages

	 *

	 * Note: If we ever support P2P hotplug on Book3E, we'll have

	 * to do an appropriate TLB flush here too

	 */

	if (bus->self) {

		struct resource *res = bus->resource[0];
@@ -427,8 +430,10 @@ int pcibios_unmap_io_space(struct pci_bus *bus) 
		pr_debug("IO unmapping for PCI-PCI bridge %s\n",

			 pci_name(bus->self));



#ifdef CONFIG_PPC_STD_MMU_64

		__flush_hash_table_range(&init_mm, res->start + _IO_BASE,

					 res->end + _IO_BASE + 1);

#endif

		return 0;

	}