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Commit 93003ced authored by Linux Build Service Account's avatar Linux Build Service Account
Browse files

Promotion of kernel.lnx.4.4.c7-170824. 

CRs      Change ID                                   Subject
--------------------------------------------------------------------------------------------------------------
2091948   I8a185ebd4126f7d064de90bf652bc96c2ab7b408   ASoC: APR: initialize struct member before being used
2083024   Ie576feeb7622376e8cb0dd8454b626b3b24b190b   usb: pd: force disconnect upon unexpected SRC->SNK trans
2091953   Iaf3ff1232e85ae8d26e9d97ce4c2aa3408da7a80   ASoC: msm: qdspv2: initialize struct member before being
2090483   Idffcd3b82b9590dbfdcaf14b80668cc894178f54   msm: sensor: Fix crash when ioctl VIDIOC_MSM_SENSOR_INIT
2053532   I7cb08abce76025930681f6532c03708793d3acc4   msm: mdss: dp: fix div by zero error
2081806   I8a918dc306e639d50a896c8d77f8eb7a72fcb195   msm: sensor: Add mutex lock during ois power down operat
2094921   Ic26ef47478ed2ae8edb05aeaec182bb170c4f32d   Enable multi-channel bit for SCO Tx with water mark leve
2089338   I40fa9a25cd86f5d39fbe6f6e3f83d6ab467d615f   drm/msm: Disable clocks when GPU is inactive
2089338   Ibabecba77501d6a3b188b19c90c172de7d667c8c   drm/msm: Set memory retention flags on the GPU core cloc
2083441   I4c14c580ee457ee847e861870a6e2fb88f71411d   msm: sensor: Limiting error messages during sensor probe
2077943   Ia88520149905989a3b3efb94361670760b79c0bd   usb: pd: avoid missed connection notification
2057712   I9c0d9049d273633f6ef99593b1b45d98cc7c3827   clk: osm: Check for valid acd offset for input from debu
2081806   I27a735fd69d3e98fdd2ed48456336c560b6f3adc   msm: sensor: Add mutex lock during ois power down operat

Change-Id: Ia082c13774634be35c8a9968b684a269c7629c05
CRs-Fixed: 2077943, 2094921, 2053532, 2089338, 2083441, 2091948, 2090483, 2083024, 2057712, 2081806, 2091953
parents 486b948c 12768da2

drivers/bluetooth/btfm_slim_wcn3990.c

+19 −0
Original line number Diff line number Diff line
@@ -120,6 +120,18 @@ int btfm_slim_chrk_enable_port(struct btfmslim *btfmslim, uint8_t port_num, 
			BTFMSLIM_ERR("failed to write (%d) reg 0x%x", ret, reg);

			goto error;

		}

	} else if (port_num == CHRK_SB_PGD_PORT_TX_SCO) {

		/* SCO Tx */

		reg_val = 0x1 << CHRK_SB_PGD_PORT_TX_SCO;

		reg = CHRK_SB_PGD_TX_PORTn_MULTI_CHNL_0(port_num);

		BTFMSLIM_DBG("writing reg_val (%d) to reg(%x)",

				reg_val, reg);

		ret = btfm_slim_write(btfmslim, reg, 1, &reg_val, IFD);

		if (ret) {

			BTFMSLIM_ERR("failed to write (%d) reg 0x%x",

					ret, reg);

			goto error;

		}

	}



	/* Enable Tx port hw auto recovery for underrun or overrun error */
@@ -141,12 +153,19 @@ enable_disable_rxport: 
		if (is_fm_port(port_num))

			reg_val = CHRK_SB_PGD_PORT_ENABLE |

					CHRK_SB_PGD_PORT_WM_L3;

		else if (port_num == CHRK_SB_PGD_PORT_TX_SCO)

			reg_val = CHRK_SB_PGD_PORT_ENABLE |

					CHRK_SB_PGD_PORT_WM_L1;

		else

			reg_val = CHRK_SB_PGD_PORT_ENABLE |

					CHRK_SB_PGD_PORT_WM_LB;

	} else

		reg_val = CHRK_SB_PGD_PORT_DISABLE;



	if (enable && port_num == CHRK_SB_PGD_PORT_TX_SCO)

		BTFMSLIM_INFO("programming SCO Tx with reg_val %d to reg 0x%x",

				reg_val, reg);



	ret = btfm_slim_write(btfmslim, reg, 1, &reg_val, IFD);

	if (ret)

		BTFMSLIM_ERR("failed to write (%d) reg 0x%x", ret, reg);

drivers/clk/msm/clock-osm.c

+28 −0
Original line number Diff line number Diff line
@@ -397,6 +397,7 @@ struct clk_osm { 
	u32 acd_extint1_cfg;

	u32 acd_autoxfer_ctl;

	u32 acd_debugfs_addr;

	u32 acd_debugfs_addr_size;

	bool acd_init;

	bool secure_init;

	bool red_fsm_en;
@@ -1449,6 +1450,7 @@ static int clk_osm_resources_init(struct platform_device *pdev) 
			return -ENOMEM;

		}

		pwrcl_clk.pbases[ACD_BASE] = pbase;

		pwrcl_clk.acd_debugfs_addr_size = resource_size(res);

		pwrcl_clk.vbases[ACD_BASE] = vbase;

		pwrcl_clk.acd_init = true;

	} else {
@@ -1466,6 +1468,7 @@ static int clk_osm_resources_init(struct platform_device *pdev) 
			return -ENOMEM;

		}

		perfcl_clk.pbases[ACD_BASE] = pbase;

		perfcl_clk.acd_debugfs_addr_size = resource_size(res);

		perfcl_clk.vbases[ACD_BASE] = vbase;

		perfcl_clk.acd_init = true;

	} else {
@@ -3015,6 +3018,11 @@ static int debugfs_get_debug_reg(void *data, u64 *val) 
{

	struct clk_osm *c = data;



	if (!c->pbases[ACD_BASE]) {

		pr_err("ACD base start not defined\n");

		return -EINVAL;

	}



	if (c->acd_debugfs_addr >= ACD_MASTER_ONLY_REG_ADDR)

		*val = readl_relaxed((char *)c->vbases[ACD_BASE] +

				     c->acd_debugfs_addr);
@@ -3027,6 +3035,11 @@ static int debugfs_set_debug_reg(void *data, u64 val) 
{

	struct clk_osm *c = data;



	if (!c->pbases[ACD_BASE]) {

		pr_err("ACD base start not defined\n");

		return -EINVAL;

	}



	if (c->acd_debugfs_addr >= ACD_MASTER_ONLY_REG_ADDR)

		clk_osm_acd_master_write_reg(c, val, c->acd_debugfs_addr);

	else
@@ -3044,7 +3057,13 @@ static int debugfs_get_debug_reg_addr(void *data, u64 *val) 
{

	struct clk_osm *c = data;



	if (!c->pbases[ACD_BASE]) {

		pr_err("ACD base start not defined\n");

		return -EINVAL;

	}



	*val = c->acd_debugfs_addr;



	return 0;

}
@@ -3052,7 +3071,16 @@ static int debugfs_set_debug_reg_addr(void *data, u64 val) 
{

	struct clk_osm *c = data;



	if (!c->pbases[ACD_BASE]) {

		pr_err("ACD base start not defined\n");

		return -EINVAL;

	}



	if (val >= c->acd_debugfs_addr_size)

		return -EINVAL;



	c->acd_debugfs_addr = val;



	return 0;

}

DEFINE_SIMPLE_ATTRIBUTE(debugfs_acd_debug_reg_addr_fops,

drivers/clk/qcom/clk-cpu-osm.c

+27 −0
Original line number Diff line number Diff line
@@ -384,6 +384,7 @@ struct clk_osm { 
	u32 acd_extint1_cfg;

	u32 acd_autoxfer_ctl;

	u32 acd_debugfs_addr;

	u32 acd_debugfs_addr_size;

	bool acd_init;

	bool secure_init;

	bool red_fsm_en;
@@ -1371,6 +1372,7 @@ static int clk_osm_resources_init(struct platform_device *pdev) 
			return -ENOMEM;

		}

		pwrcl_clk.pbases[ACD_BASE] = pbase;

		pwrcl_clk.acd_debugfs_addr_size = resource_size(res);

		pwrcl_clk.vbases[ACD_BASE] = vbase;

		pwrcl_clk.acd_init = true;

	} else {
@@ -1388,6 +1390,7 @@ static int clk_osm_resources_init(struct platform_device *pdev) 
			return -ENOMEM;

		}

		perfcl_clk.pbases[ACD_BASE] = pbase;

		perfcl_clk.acd_debugfs_addr_size = resource_size(res);

		perfcl_clk.vbases[ACD_BASE] = vbase;

		perfcl_clk.acd_init = true;

	} else {
@@ -2832,6 +2835,11 @@ static int debugfs_get_debug_reg(void *data, u64 *val) 
{

	struct clk_osm *c = data;



	if (!c->pbases[ACD_BASE]) {

		pr_err("ACD base start not defined\n");

		return -EINVAL;

	}



	if (c->acd_debugfs_addr >= ACD_MASTER_ONLY_REG_ADDR)

		*val = readl_relaxed((char *)c->vbases[ACD_BASE] +

				     c->acd_debugfs_addr);
@@ -2844,6 +2852,11 @@ static int debugfs_set_debug_reg(void *data, u64 val) 
{

	struct clk_osm *c = data;



	if (!c->pbases[ACD_BASE]) {

		pr_err("ACD base start not defined\n");

		return -EINVAL;

	}



	if (c->acd_debugfs_addr >= ACD_MASTER_ONLY_REG_ADDR)

		clk_osm_acd_master_write_reg(c, val, c->acd_debugfs_addr);

	else
@@ -2861,7 +2874,13 @@ static int debugfs_get_debug_reg_addr(void *data, u64 *val) 
{

	struct clk_osm *c = data;



	if (!c->pbases[ACD_BASE]) {

		pr_err("ACD base start not defined\n");

		return -EINVAL;

	}



	*val = c->acd_debugfs_addr;



	return 0;

}
@@ -2869,6 +2888,14 @@ static int debugfs_set_debug_reg_addr(void *data, u64 val) 
{

	struct clk_osm *c = data;



	if (!c->pbases[ACD_BASE]) {

		pr_err("ACD base start not defined\n");

		return -EINVAL;

	}



	if (val >= c->acd_debugfs_addr_size)

		return -EINVAL;



	c->acd_debugfs_addr = val;

	return 0;

}

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

+18 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
#include "msm_iommu.h"

#include "msm_trace.h"

#include "a5xx_gpu.h"

#include <linux/clk/msm-clk.h>



#define SECURE_VA_START 0xc0000000

#define SECURE_VA_SIZE  SZ_256M
@@ -1169,6 +1170,17 @@ static int a5xx_pm_resume(struct msm_gpu *gpu) 
{

	int ret;



	/*

	 * Between suspend/resumes the GPU clocks need to be turned off

	 * but not a complete power down, typically between frames. Set the

	 * memory retention flags on the GPU core clock to retain memory

	 * across clock toggles.

	 */

	if (gpu->core_clk) {

		clk_set_flags(gpu->core_clk, CLKFLAG_RETAIN_PERIPH);

		clk_set_flags(gpu->core_clk, CLKFLAG_RETAIN_MEM);

	}



	/* Turn on the core power */

	ret = msm_gpu_pm_resume(gpu);

	if (ret)
@@ -1208,6 +1220,12 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu) 
{

	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);



	/* Turn off the memory retention flag when not necessary */

	if (gpu->core_clk) {

		clk_set_flags(gpu->core_clk, CLKFLAG_NORETAIN_PERIPH);

		clk_set_flags(gpu->core_clk, CLKFLAG_NORETAIN_MEM);

	}



	/* Only do this next bit if we are about to go down */

	if (gpu->active_cnt == 1) {

		/* Clear the VBIF pipe before shutting down */

drivers/gpu/drm/msm/msm_gpu.c

+8 −1
Original line number Diff line number Diff line
@@ -863,7 +863,14 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, 
	gpu->dev = drm;

	gpu->funcs = funcs;

	gpu->name = name;

	gpu->inactive = true;

	/*

	 * Set the inactive flag to false, so that when the retire worker

	 * kicks in from the init path, it knows that it has to turn off the

	 * clocks. This should be fine to do since this is the init sequence

	 * and we have an init_lock in msm_open() to protect against bad things

	 * from happening.

	 */

	gpu->inactive = false;



	INIT_LIST_HEAD(&gpu->active_list);

	INIT_WORK(&gpu->retire_work, retire_worker);