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Commit 92df0f8b authored by Ralf Baechle's avatar Ralf Baechle
Browse files

MIPS: math-emu: Convert debug printks to pr_debug getting. 



And another bunch of #ifdefs bite the dust.

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent fcfe2285

arch/mips/math-emu/cp1emu.c

+6 −10
Original line number Diff line number Diff line
@@ -1119,11 +1119,9 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx, 
				value = ctx->fcr31;

				value = (value & ~FPU_CSR_RM) |

					mips_rm[modeindex(value)];

#ifdef CSRTRACE

				printk("%p gpr[%d]<-csr=%08x\n",

				pr_debug("%p gpr[%d]<-csr=%08x\n",

					 (void *) (xcp->cp0_epc),

					 MIPSInst_RT(ir), value);

#endif

			}

			else if (MIPSInst_RD(ir) == FPCREG_RID)

				value = 0;
@@ -1146,11 +1144,9 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx, 
			/* we only have one writable control reg

			 */

			if (MIPSInst_RD(ir) == FPCREG_CSR) {

#ifdef CSRTRACE

				printk("%p gpr[%d]->csr=%08x\n",

				pr_debug("%p gpr[%d]->csr=%08x\n",

					 (void *) (xcp->cp0_epc),

					 MIPSInst_RT(ir), value);

#endif



				/*

				 * Don't write reserved bits,

arch/mips/math-emu/dsemul.c

+3 −6
Original line number Diff line number Diff line
@@ -44,10 +44,8 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc) 
		clear_delay_slot(regs);

		return 0;

	}

#ifdef DSEMUL_TRACE

	printk("dsemul %lx %lx\n", regs->cp0_epc, cpc);



#endif

	pr_debug("dsemul %lx %lx\n", regs->cp0_epc, cpc);



	/*

	 * The strategy is to push the instruction onto the user stack
@@ -149,9 +147,8 @@ int do_dsemulret(struct pt_regs *xcp) 
	 * emulating the branch delay instruction.

	 */



#ifdef DSEMUL_TRACE

	printk("dsemulret\n");

#endif

	pr_debug("dsemulret\n");



	if (__get_user(epc, &fr->epc)) {		/* Saved EPC */

		/* This is not a good situation to be in */

		force_sig(SIGBUS, current);