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Commit 8f57be8e authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'at91/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
  at91: add arch specific ioremap support
  at91: factorize sram init
  at91: move register clocks to soc generic init
  at91: move clock subsystem init to soc generic init
  at91: use structure to store the current soc
  at91: remove AT91_DBGU offset from dbgu register macro
  at91: factorize at91 interrupts init to soc
  at91: introduce commom AT91_BASE_SYS
parents cb7dee8d fb149f9e
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+1 −1
Original line number Original line Diff line number Diff line
@@ -2,7 +2,7 @@
# Makefile for the linux kernel.
# Makefile for the linux kernel.
#
#


obj-y		:= irq.o gpio.o
obj-y		:= irq.o gpio.o setup.o
obj-m		:=
obj-m		:=
obj-n		:=
obj-n		:=
obj-		:=
obj-		:=
+10 −35
Original line number Original line Diff line number Diff line
@@ -25,23 +25,10 @@
#include <mach/at91_rstc.h>
#include <mach/at91_rstc.h>
#include <mach/at91_shdwc.h>
#include <mach/at91_shdwc.h>


#include "soc.h"
#include "generic.h"
#include "generic.h"
#include "clock.h"
#include "clock.h"


static struct map_desc at91cap9_io_desc[] __initdata = {
	{
		.virtual	= AT91_VA_BASE_SYS,
		.pfn		= __phys_to_pfn(AT91_BASE_SYS),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_IO_VIRT_BASE - AT91CAP9_SRAM_SIZE,
		.pfn		= __phys_to_pfn(AT91CAP9_SRAM_BASE),
		.length		= AT91CAP9_SRAM_SIZE,
		.type		= MT_DEVICE,
	},
};

/* --------------------------------------------------------------------
/* --------------------------------------------------------------------
 *  Clocks
 *  Clocks
 * -------------------------------------------------------------------- */
 * -------------------------------------------------------------------- */
@@ -339,24 +326,17 @@ static void at91cap9_poweroff(void)
 *  AT91CAP9 processor initialization
 *  AT91CAP9 processor initialization
 * -------------------------------------------------------------------- */
 * -------------------------------------------------------------------- */


void __init at91cap9_map_io(void)
static void __init at91cap9_map_io(void)
{
{
	/* Map peripherals */
	at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
	iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc));
}
}


void __init at91cap9_initialize(unsigned long main_clock)
static void __init at91cap9_initialize(void)
{
{
	at91_arch_reset = at91cap9_reset;
	at91_arch_reset = at91cap9_reset;
	pm_power_off = at91cap9_poweroff;
	pm_power_off = at91cap9_poweroff;
	at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
	at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);


	/* Init clock subsystem */
	at91_clock_init(main_clock);

	/* Register the processor-specific clocks */
	at91cap9_register_clocks();

	/* Register GPIO subsystem */
	/* Register GPIO subsystem */
	at91_gpio_init(at91cap9_gpio, 4);
	at91_gpio_init(at91cap9_gpio, 4);


@@ -409,14 +389,9 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
	0,	/* Advanced Interrupt Controller (IRQ1) */
	0,	/* Advanced Interrupt Controller (IRQ1) */
};
};


void __init at91cap9_init_interrupts(unsigned int priority[NR_AIC_IRQS])
struct at91_init_soc __initdata at91cap9_soc = {
{
	.map_io = at91cap9_map_io,
	if (!priority)
	.default_irq_priority = at91cap9_default_irq_priority,
		priority = at91cap9_default_irq_priority;
	.register_clocks = at91cap9_register_clocks,

	.init = at91cap9_initialize,
	/* Initialize the AIC interrupt controller */
};
	at91_aic_init(priority);

	/* Enable GPIO interrupts */
	at91_gpio_irq_setup();
}
+10 −37
Original line number Original line Diff line number Diff line
@@ -20,25 +20,16 @@
#include <mach/at91_st.h>
#include <mach/at91_st.h>
#include <mach/cpu.h>
#include <mach/cpu.h>


#include "soc.h"
#include "generic.h"
#include "generic.h"
#include "clock.h"
#include "clock.h"


static struct map_desc at91rm9200_io_desc[] __initdata = {
static struct map_desc at91rm9200_io_desc[] __initdata = {
	{
	{
		.virtual	= AT91_VA_BASE_SYS,
		.pfn		= __phys_to_pfn(AT91_BASE_SYS),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_EMAC,
		.virtual	= AT91_VA_BASE_EMAC,
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_EMAC),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_EMAC),
		.length		= SZ_16K,
		.length		= SZ_16K,
		.type		= MT_DEVICE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE,
		.pfn		= __phys_to_pfn(AT91RM9200_SRAM_BASE),
		.length		= AT91RM9200_SRAM_SIZE,
		.type		= MT_DEVICE,
	},
	},
};
};


@@ -304,24 +295,17 @@ static void at91rm9200_reset(void)
	at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
	at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
}
}


int rm9200_type;
EXPORT_SYMBOL(rm9200_type);

void __init at91rm9200_set_type(int type)
{
	rm9200_type = type;
}

/* --------------------------------------------------------------------
/* --------------------------------------------------------------------
 *  AT91RM9200 processor initialization
 *  AT91RM9200 processor initialization
 * -------------------------------------------------------------------- */
 * -------------------------------------------------------------------- */
void __init at91rm9200_map_io(void)
static void __init at91rm9200_map_io(void)
{
{
	/* Map peripherals */
	/* Map peripherals */
	at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE);
	iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
	iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
}
}


void __init at91rm9200_initialize(unsigned long main_clock)
static void __init at91rm9200_initialize(void)
{
{
	at91_arch_reset = at91rm9200_reset;
	at91_arch_reset = at91rm9200_reset;
	at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
	at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
@@ -329,12 +313,6 @@ void __init at91rm9200_initialize(unsigned long main_clock)
			| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
			| (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
			| (1 << AT91RM9200_ID_IRQ6);
			| (1 << AT91RM9200_ID_IRQ6);


	/* Init clock subsystem */
	at91_clock_init(main_clock);

	/* Register the processor-specific clocks */
	at91rm9200_register_clocks();

	/* Initialize GPIO subsystem */
	/* Initialize GPIO subsystem */
	at91_gpio_init(at91rm9200_gpio,
	at91_gpio_init(at91rm9200_gpio,
		cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP);
		cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP);
@@ -383,14 +361,9 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
	0	/* Advanced Interrupt Controller (IRQ6) */
	0	/* Advanced Interrupt Controller (IRQ6) */
};
};


void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS])
struct at91_init_soc __initdata at91rm9200_soc = {
{
	.map_io = at91rm9200_map_io,
	if (!priority)
	.default_irq_priority = at91rm9200_default_irq_priority,
		priority = at91rm9200_default_irq_priority;
	.register_clocks = at91rm9200_register_clocks,

	.init = at91rm9200_initialize,
	/* Initialize the AIC interrupt controller */
};
	at91_aic_init(priority);

	/* Enable GPIO interrupts */
	at91_gpio_irq_setup();
}
+21 −79
Original line number Original line Diff line number Diff line
@@ -17,58 +17,16 @@
#include <asm/mach/arch.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/map.h>
#include <mach/cpu.h>
#include <mach/cpu.h>
#include <mach/at91_dbgu.h>
#include <mach/at91sam9260.h>
#include <mach/at91sam9260.h>
#include <mach/at91_pmc.h>
#include <mach/at91_pmc.h>
#include <mach/at91_rstc.h>
#include <mach/at91_rstc.h>
#include <mach/at91_shdwc.h>
#include <mach/at91_shdwc.h>


#include "soc.h"
#include "generic.h"
#include "generic.h"
#include "clock.h"
#include "clock.h"


static struct map_desc at91sam9260_io_desc[] __initdata = {
	{
		.virtual	= AT91_VA_BASE_SYS,
		.pfn		= __phys_to_pfn(AT91_BASE_SYS),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}
};

static struct map_desc at91sam9260_sram_desc[] __initdata = {
	{
		.virtual	= AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
		.pfn		= __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
		.length		= AT91SAM9260_SRAM0_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE,
		.pfn		= __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
		.length		= AT91SAM9260_SRAM1_SIZE,
		.type		= MT_DEVICE,
	}
};

static struct map_desc at91sam9g20_sram_desc[] __initdata = {
	{
		.virtual	= AT91_IO_VIRT_BASE - AT91SAM9G20_SRAM0_SIZE,
		.pfn		= __phys_to_pfn(AT91SAM9G20_SRAM0_BASE),
		.length		= AT91SAM9G20_SRAM0_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_IO_VIRT_BASE - AT91SAM9G20_SRAM0_SIZE - AT91SAM9G20_SRAM1_SIZE,
		.pfn		= __phys_to_pfn(AT91SAM9G20_SRAM1_BASE),
		.length		= AT91SAM9G20_SRAM1_SIZE,
		.type		= MT_DEVICE,
	}
};

static struct map_desc at91sam9xe_sram_desc[] __initdata = {
	{
		.pfn		= __phys_to_pfn(AT91SAM9XE_SRAM_BASE),
		.type		= MT_DEVICE,
	}
};

/* --------------------------------------------------------------------
/* --------------------------------------------------------------------
 *  Clocks
 *  Clocks
 * -------------------------------------------------------------------- */
 * -------------------------------------------------------------------- */
@@ -330,11 +288,9 @@ static void at91sam9260_poweroff(void)


static void __init at91sam9xe_map_io(void)
static void __init at91sam9xe_map_io(void)
{
{
	unsigned long cidr, sram_size;
	unsigned long sram_size;

	cidr = at91_sys_read(AT91_DBGU_CIDR);


	switch (cidr & AT91_CIDR_SRAMSIZ) {
	switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) {
		case AT91_CIDR_SRAMSIZ_32K:
		case AT91_CIDR_SRAMSIZ_32K:
			sram_size = 2 * SZ_16K;
			sram_size = 2 * SZ_16K;
			break;
			break;
@@ -343,38 +299,29 @@ static void __init at91sam9xe_map_io(void)
			sram_size = SZ_16K;
			sram_size = SZ_16K;
	}
	}


	at91sam9xe_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size;
	at91_init_sram(0, AT91SAM9XE_SRAM_BASE, sram_size);
	at91sam9xe_sram_desc->length = sram_size;

	iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc));
}
}


void __init at91sam9260_map_io(void)
static void __init at91sam9260_map_io(void)
{
{
	/* Map peripherals */
	if (cpu_is_at91sam9xe()) {
	iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));

	if (cpu_is_at91sam9xe())
		at91sam9xe_map_io();
		at91sam9xe_map_io();
	else if (cpu_is_at91sam9g20())
	} else if (cpu_is_at91sam9g20()) {
		iotable_init(at91sam9g20_sram_desc, ARRAY_SIZE(at91sam9g20_sram_desc));
		at91_init_sram(0, AT91SAM9G20_SRAM0_BASE, AT91SAM9G20_SRAM0_SIZE);
	else
		at91_init_sram(1, AT91SAM9G20_SRAM1_BASE, AT91SAM9G20_SRAM1_SIZE);
		iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
	} else {
		at91_init_sram(0, AT91SAM9260_SRAM0_BASE, AT91SAM9260_SRAM0_SIZE);
		at91_init_sram(1, AT91SAM9260_SRAM1_BASE, AT91SAM9260_SRAM1_SIZE);
	}
}
}


void __init at91sam9260_initialize(unsigned long main_clock)
static void __init at91sam9260_initialize(void)
{
{
	at91_arch_reset = at91sam9_alt_reset;
	at91_arch_reset = at91sam9_alt_reset;
	pm_power_off = at91sam9260_poweroff;
	pm_power_off = at91sam9260_poweroff;
	at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
	at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
			| (1 << AT91SAM9260_ID_IRQ2);
			| (1 << AT91SAM9260_ID_IRQ2);


	/* Init clock subsystem */
	at91_clock_init(main_clock);

	/* Register the processor-specific clocks */
	at91sam9260_register_clocks();

	/* Register GPIO subsystem */
	/* Register GPIO subsystem */
	at91_gpio_init(at91sam9260_gpio, 3);
	at91_gpio_init(at91sam9260_gpio, 3);
}
}
@@ -421,14 +368,9 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
	0,	/* Advanced Interrupt Controller */
	0,	/* Advanced Interrupt Controller */
};
};


void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS])
struct at91_init_soc __initdata at91sam9260_soc = {
{
	.map_io = at91sam9260_map_io,
	if (!priority)
	.default_irq_priority = at91sam9260_default_irq_priority,
		priority = at91sam9260_default_irq_priority;
	.register_clocks = at91sam9260_register_clocks,

	.init = at91sam9260_initialize,
	/* Initialize the AIC interrupt controller */
};
	at91_aic_init(priority);

	/* Enable GPIO interrupts */
	at91_gpio_irq_setup();
}
+11 −51
Original line number Original line Diff line number Diff line
@@ -22,36 +22,10 @@
#include <mach/at91_rstc.h>
#include <mach/at91_rstc.h>
#include <mach/at91_shdwc.h>
#include <mach/at91_shdwc.h>


#include "soc.h"
#include "generic.h"
#include "generic.h"
#include "clock.h"
#include "clock.h"


static struct map_desc at91sam9261_io_desc[] __initdata = {
	{
		.virtual	= AT91_VA_BASE_SYS,
		.pfn		= __phys_to_pfn(AT91_BASE_SYS),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	},
};

static struct map_desc at91sam9261_sram_desc[] __initdata = {
	{
		.virtual	= AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
		.pfn		= __phys_to_pfn(AT91SAM9261_SRAM_BASE),
		.length		= AT91SAM9261_SRAM_SIZE,
		.type		= MT_DEVICE,
	},
};

static struct map_desc at91sam9g10_sram_desc[] __initdata = {
	{
		.virtual	= AT91_IO_VIRT_BASE - AT91SAM9G10_SRAM_SIZE,
		.pfn		= __phys_to_pfn(AT91SAM9G10_SRAM_BASE),
		.length		= AT91SAM9G10_SRAM_SIZE,
		.type		= MT_DEVICE,
	},
};

/* --------------------------------------------------------------------
/* --------------------------------------------------------------------
 *  Clocks
 *  Clocks
 * -------------------------------------------------------------------- */
 * -------------------------------------------------------------------- */
@@ -302,30 +276,21 @@ static void at91sam9261_poweroff(void)
 *  AT91SAM9261 processor initialization
 *  AT91SAM9261 processor initialization
 * -------------------------------------------------------------------- */
 * -------------------------------------------------------------------- */


void __init at91sam9261_map_io(void)
static void __init at91sam9261_map_io(void)
{
{
	/* Map peripherals */
	iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));

	if (cpu_is_at91sam9g10())
	if (cpu_is_at91sam9g10())
		iotable_init(at91sam9g10_sram_desc, ARRAY_SIZE(at91sam9g10_sram_desc));
		at91_init_sram(0, AT91SAM9G10_SRAM_BASE, AT91SAM9G10_SRAM_SIZE);
	else
	else
		iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc));
		at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
}
}


void __init at91sam9261_initialize(unsigned long main_clock)
static void __init at91sam9261_initialize(void)
{
{
	at91_arch_reset = at91sam9_alt_reset;
	at91_arch_reset = at91sam9_alt_reset;
	pm_power_off = at91sam9261_poweroff;
	pm_power_off = at91sam9261_poweroff;
	at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
	at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
			| (1 << AT91SAM9261_ID_IRQ2);
			| (1 << AT91SAM9261_ID_IRQ2);


	/* Init clock subsystem */
	at91_clock_init(main_clock);

	/* Register the processor-specific clocks */
	at91sam9261_register_clocks();

	/* Register GPIO subsystem */
	/* Register GPIO subsystem */
	at91_gpio_init(at91sam9261_gpio, 3);
	at91_gpio_init(at91sam9261_gpio, 3);
}
}
@@ -372,14 +337,9 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
	0,	/* Advanced Interrupt Controller */
	0,	/* Advanced Interrupt Controller */
};
};


void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
struct at91_init_soc __initdata at91sam9261_soc = {
{
	.map_io = at91sam9261_map_io,
	if (!priority)
	.default_irq_priority = at91sam9261_default_irq_priority,
		priority = at91sam9261_default_irq_priority;
	.register_clocks = at91sam9261_register_clocks,

	.init = at91sam9261_initialize,
	/* Initialize the AIC interrupt controller */
};
	at91_aic_init(priority);

	/* Enable GPIO interrupts */
	at91_gpio_irq_setup();
}
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