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Commit 8f1a482f authored by Subbaraman Narayanamurthy's avatar Subbaraman Narayanamurthy
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power: qpnp-fg-gen3: Add support to configure ESR pulse thresholds 



ESR pulse qualification threshold and measurement current should
get set properly without which ESR pulses can fire frequently
causing frequent wakeups. Add support to configure them. Use the
default values as per the hardware recommendation.

Change-Id: I160b2171c46df483c7fa4da2ce23009d99c6dcff
Signed-off-by: default avatarSubbaraman Narayanamurthy <subbaram@codeaurora.org>
parent 0356676d

Documentation/devicetree/bindings/power/supply/qcom/qpnp-fg-gen3.txt

+14 −0
Original line number Diff line number Diff line
@@ -154,6 +154,20 @@ First Level Node - FG Gen3 device 
		    asleep and the battery is discharging. This option requires

		    qcom,fg-esr-timer-awake to be defined.



- qcom,fg-esr-pulse-thresh-ma

	Usage:      optional

	Value type: <u32>

	Definition: ESR pulse qualification threshold in mA. If this is not

		    specified, a default value of 110 mA will be configured.

		    Allowed values are from 1 to 997.



- qcom,fg-esr-meas-curr-ma

	Usage:      optional

	Value type: <u32>

	Definition: ESR measurement current in mA. If this is not specified,

		    a default value of 120 mA will be configured. Allowed

		    values are 60, 120, 180 and 240.



- qcom,cycle-counter-en

	Usage:      optional

	Value type: <empty>

drivers/power/supply/qcom/fg-core.h

+3 −0
Original line number Diff line number Diff line
@@ -162,6 +162,7 @@ enum fg_sram_param_id { 
	FG_SRAM_ESR_TIMER_DISCHG_INIT,

	FG_SRAM_ESR_TIMER_CHG_MAX,

	FG_SRAM_ESR_TIMER_CHG_INIT,

	FG_SRAM_ESR_PULSE_THRESH,

	FG_SRAM_SYS_TERM_CURR,

	FG_SRAM_CHG_TERM_CURR,

	FG_SRAM_DELTA_MSOC_THR,
@@ -253,6 +254,8 @@ struct fg_dt_props { 
	int	esr_tight_lt_flt_upct;

	int	esr_broad_lt_flt_upct;

	int	slope_limit_temp;

	int	esr_pulse_thresh_ma;

	int	esr_meas_curr_ma;

	int	jeita_thresholds[NUM_JEITA_LEVELS];

	int	ki_coeff_soc[KI_COEFF_SOC_LEVELS];

	int	ki_coeff_med_dischg[KI_COEFF_SOC_LEVELS];

drivers/power/supply/qcom/fg-reg.h

+1 −0
Original line number Diff line number Diff line
@@ -167,6 +167,7 @@ 


/* BATT_INFO_ESR_PULL_DN_CFG */

#define ESR_PULL_DOWN_IVAL_MASK			GENMASK(3, 2)

#define ESR_PULL_DOWN_IVAL_SHIFT		2

#define ESR_MEAS_CUR_60MA			0x0

#define ESR_MEAS_CUR_120MA			0x1

#define ESR_MEAS_CUR_180MA			0x2

drivers/power/supply/qcom/qpnp-fg-gen3.c

+65 −0
Original line number Diff line number Diff line
@@ -31,6 +31,8 @@ 
#define FG_MEM_INFO_PMI8998		0x0D



/* SRAM address and offset in ascending order */

#define ESR_PULSE_THRESH_WORD		2

#define ESR_PULSE_THRESH_OFFSET		3

#define SLOPE_LIMIT_WORD		3

#define SLOPE_LIMIT_OFFSET		0

#define CUTOFF_VOLT_WORD		5
@@ -216,6 +218,8 @@ static struct fg_sram_param pmi8998_v1_sram_params[] = { 
		ESR_TIMER_CHG_MAX_OFFSET, 2, 1, 1, 0, fg_encode_default, NULL),

	PARAM(ESR_TIMER_CHG_INIT, ESR_TIMER_CHG_INIT_WORD,

		ESR_TIMER_CHG_INIT_OFFSET, 2, 1, 1, 0, fg_encode_default, NULL),

	PARAM(ESR_PULSE_THRESH, ESR_PULSE_THRESH_WORD, ESR_PULSE_THRESH_OFFSET,

		1, 100000, 390625, 0, fg_encode_default, NULL),

	PARAM(KI_COEFF_MED_DISCHG, KI_COEFF_MED_DISCHG_WORD,

		KI_COEFF_MED_DISCHG_OFFSET, 1, 1000, 244141, 0,

		fg_encode_default, NULL),
@@ -286,6 +290,8 @@ static struct fg_sram_param pmi8998_v2_sram_params[] = { 
		ESR_TIMER_CHG_MAX_OFFSET, 2, 1, 1, 0, fg_encode_default, NULL),

	PARAM(ESR_TIMER_CHG_INIT, ESR_TIMER_CHG_INIT_WORD,

		ESR_TIMER_CHG_INIT_OFFSET, 2, 1, 1, 0, fg_encode_default, NULL),

	PARAM(ESR_PULSE_THRESH, ESR_PULSE_THRESH_WORD, ESR_PULSE_THRESH_OFFSET,

		1, 100000, 390625, 0, fg_encode_default, NULL),

	PARAM(KI_COEFF_MED_DISCHG, KI_COEFF_MED_DISCHG_v2_WORD,

		KI_COEFF_MED_DISCHG_v2_OFFSET, 1, 1000, 244141, 0,

		fg_encode_default, NULL),
@@ -981,6 +987,29 @@ static inline void get_batt_temp_delta(int delta, u8 *val) 
	};

}



static inline void get_esr_meas_current(int curr_ma, u8 *val)

{

	switch (curr_ma) {

	case 60:

		*val = ESR_MEAS_CUR_60MA;

		break;

	case 120:

		*val = ESR_MEAS_CUR_120MA;

		break;

	case 180:

		*val = ESR_MEAS_CUR_180MA;

		break;

	case 240:

		*val = ESR_MEAS_CUR_240MA;

		break;

	default:

		*val = ESR_MEAS_CUR_120MA;

		break;

	};



	*val <<= ESR_PULL_DOWN_IVAL_SHIFT;

}



static int fg_set_esr_timer(struct fg_chip *chip, int cycles, bool charging,

				int flags)

{
@@ -3247,6 +3276,24 @@ static int fg_hw_init(struct fg_chip *chip) 
		return rc;

	}



	fg_encode(chip->sp, FG_SRAM_ESR_PULSE_THRESH,

		chip->dt.esr_pulse_thresh_ma, buf);

	rc = fg_sram_write(chip, chip->sp[FG_SRAM_ESR_PULSE_THRESH].addr_word,

			chip->sp[FG_SRAM_ESR_PULSE_THRESH].addr_byte, buf,

			chip->sp[FG_SRAM_ESR_PULSE_THRESH].len, FG_IMA_DEFAULT);

	if (rc < 0) {

		pr_err("Error in writing esr_pulse_thresh_ma, rc=%d\n", rc);

		return rc;

	}



	get_esr_meas_current(chip->dt.esr_meas_curr_ma, &val);

	rc = fg_masked_write(chip, BATT_INFO_ESR_PULL_DN_CFG(chip),

			ESR_PULL_DOWN_IVAL_MASK, val);

	if (rc < 0) {

		pr_err("Error in writing esr_meas_curr_ma, rc=%d\n", rc);

		return rc;

	}



	return 0;

}
@@ -3730,6 +3777,8 @@ static int fg_parse_ki_coefficients(struct fg_chip *chip) 
#define DEFAULT_ESR_TIGHT_LT_FLT_UPCT	48829

#define DEFAULT_ESR_BROAD_LT_FLT_UPCT	148438

#define DEFAULT_ESR_CLAMP_MOHMS		20

#define DEFAULT_ESR_PULSE_THRESH_MA	110

#define DEFAULT_ESR_MEAS_CURR_MA	120

static int fg_parse_dt(struct fg_chip *chip)

{

	struct device_node *child, *revid_node, *node = chip->dev->of_node;
@@ -4047,6 +4096,22 @@ static int fg_parse_dt(struct fg_chip *chip) 
	else

		chip->dt.esr_clamp_mohms = temp;



	chip->dt.esr_pulse_thresh_ma = DEFAULT_ESR_PULSE_THRESH_MA;

	rc = of_property_read_u32(node, "qcom,fg-esr-pulse-thresh-ma", &temp);

	if (!rc) {

		/* ESR pulse qualification threshold range is 1-997 mA */

		if (temp > 0 && temp < 997)

			chip->dt.esr_pulse_thresh_ma = temp;

	}



	chip->dt.esr_meas_curr_ma = DEFAULT_ESR_MEAS_CURR_MA;

	rc = of_property_read_u32(node, "qcom,fg-esr-meas-curr-ma", &temp);

	if (!rc) {

		/* ESR measurement current range is 60-240 mA */

		if (temp >= 60 || temp <= 240)

			chip->dt.esr_meas_curr_ma = temp;

	}



	return 0;

}