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Commit 8eac9a50 authored by Jordan Crouse's avatar Jordan Crouse
Browse files

drm/msm: Check value of active_cnt in a5xx power functions



The generic msm_gpu_pm_resume/msm_gpu_pm_suspend functions have
built-in reference counting but the a5xx specific functions
are doing unconditional a5xx specific setup / teardown that
would behave very badly if they were not accompanied by an
actual power up / power down.

Change-Id: Ic0dedbad549c4ea9a5c68b0ca43eb98e0449d54b
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent cffa5f76
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+22 −13
Original line number Diff line number Diff line
@@ -1168,6 +1168,10 @@ static int a5xx_pm_resume(struct msm_gpu *gpu)
	if (ret)
		return ret;

	/* If we are already up, don't mess with what works */
	if (gpu->active_cnt > 1)
		return 0;

	/* Turn the RBCCU domain first to limit the chances of voltage droop */
	gpu_write(gpu, REG_A5XX_GPMU_RBCCU_POWER_CNTL, 0x778000);

@@ -1198,10 +1202,13 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
{
	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);

	/* Only do this next bit if we are about to go down */
	if (gpu->active_cnt == 1) {
		/* Clear the VBIF pipe before shutting down */

		gpu_write(gpu, REG_A5XX_VBIF_XIN_HALT_CTRL0, 0xF);
	spin_until((gpu_read(gpu, REG_A5XX_VBIF_XIN_HALT_CTRL1) & 0xF) == 0xF);
		spin_until((gpu_read(gpu, REG_A5XX_VBIF_XIN_HALT_CTRL1) & 0xF)
			== 0xF);

		gpu_write(gpu, REG_A5XX_VBIF_XIN_HALT_CTRL0, 0);

@@ -1209,11 +1216,13 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
		 * Reset the VBIF before power collapse to avoid issue with FIFO
		* entries
		*/

		if (adreno_is_a530(adreno_gpu)) {
			/* These only need to be done for A530 */
		gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000);
		gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000);
			gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD,
				0x003C0000);
			gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD,
				0x00000000);
		}
	}

	return msm_gpu_pm_suspend(gpu);