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Commit 8ca1dae0 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "Revert "clk: msm: clock-gpu-cobalt: Update the graphics core clock frequency""

parents 16a21bcd 45430a0c

arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi

+4 −2
Original line number Diff line number Diff line
@@ -245,7 +245,8 @@ 
		< 414000000 4 RPM_SMD_REGULATOR_LEVEL_SVS >,

		< 515000000 5 RPM_SMD_REGULATOR_LEVEL_NOM >,

		< 596000000 6 RPM_SMD_REGULATOR_LEVEL_NOM >,

		< 670000000 7 RPM_SMD_REGULATOR_LEVEL_TURBO >;

		< 670000000 7 RPM_SMD_REGULATOR_LEVEL_TURBO >,

		< 710000000 8 RPM_SMD_REGULATOR_LEVEL_TURBO >;

	qcom,gfxfreq-mx-speedbin0 =

		<         0                           0 >,

		< 180000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
@@ -254,7 +255,8 @@ 
		< 414000000 RPM_SMD_REGULATOR_LEVEL_SVS >,

		< 515000000 RPM_SMD_REGULATOR_LEVEL_NOM >,

		< 596000000 RPM_SMD_REGULATOR_LEVEL_NOM >,

		< 670000000 RPM_SMD_REGULATOR_LEVEL_TURBO >;

		< 670000000 RPM_SMD_REGULATOR_LEVEL_TURBO >,

		< 710000000 RPM_SMD_REGULATOR_LEVEL_TURBO >;

};



&mdss_mdp {

drivers/clk/msm/clock-gpu-cobalt.c

+2 −1
Original line number Diff line number Diff line
@@ -173,6 +173,7 @@ static struct clk_freq_tbl ftbl_gfx3d_clk_src_v2[] = { 
	F_SLEW( 515000000, 1030000000, gpu_pll0_pll_out_even,    1, 0, 0),

	F_SLEW( 596000000, 1192000000, gpu_pll0_pll_out_even,    1, 0, 0),

	F_SLEW( 670000000, 1340000000, gpu_pll0_pll_out_even,    1, 0, 0),

	F_SLEW( 710000000, 1420000000, gpu_pll0_pll_out_even,    1, 0, 0),

	F_END

};
@@ -611,7 +612,7 @@ static void msm_gfxcc_hamster_fixup(void) 


static void msm_gfxcc_cobalt_v2_fixup(void)

{

	gpu_pll0_pll.c.fmax[VDD_DIG_MIN] = 1340000500;

	gpu_pll0_pll.c.fmax[VDD_DIG_MIN] = 1420000500;

	gfx3d_clk_src.freq_tbl = ftbl_gfx3d_clk_src_v2;

}