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Commit 87b87890 authored by Neeraj Upadhyay's avatar Neeraj Upadhyay
Browse files

ARM: dts: msm: correct cpu nodes information for msmtriton 



Correct the mpidr configuration for cpu nodes, so that cpu
topology matches the layout of physical CPUs for msmtriton.

Change-Id: Id568f76e03b93cf411366abf01ea857fb80ff1bf
Signed-off-by: default avatarNeeraj Upadhyay <neeraju@codeaurora.org>
parent fac2c0da

arch/arm/boot/dts/qcom/msmtriton.dtsi

+16 −16
Original line number Diff line number Diff line
@@ -41,59 +41,59 @@ 
		#address-cells = <2>;

		#size-cells = <0>;



		CPU0: cpu@0 {

		CPU0: cpu@100 {

			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x0>;

			reg = <0x0 0x100>;

			enable-method = "psci";

		};



		CPU1: cpu@1 {

		CPU1: cpu@101 {

			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x1>;

			reg = <0x0 0x101>;

			enable-method = "psci";

		};



		CPU2: cpu@2 {

		CPU2: cpu@102 {

			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x2>;

			reg = <0x0 0x102>;

			enable-method = "psci";

		};



		CPU3: cpu@3 {

		CPU3: cpu@103 {

			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x3>;

			reg = <0x0 0x103>;

			enable-method = "psci";

		};



		CPU4: cpu@100 {

		CPU4: cpu@0 {

			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x100>;

			reg = <0x0 0x0>;

			enable-method = "psci";

		};



		CPU5: cpu@101 {

		CPU5: cpu@1 {

			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x101>;

			reg = <0x0 0x1>;

			enable-method = "psci";

		};



		CPU6: cpu@102 {

		CPU6: cpu@2 {

			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x102>;

			reg = <0x0 0x2>;

			enable-method = "psci";

		};



		CPU7: cpu@103 {

		CPU7: cpu@3 {

			device_type = "cpu";

			compatible = "arm,armv8";

			reg = <0x0 0x103>;

			reg = <0x0 0x3>;

			enable-method = "psci";

		};