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Commit 877d6685 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt
Browse files

Merge remote-tracking branch 'kumar/next' into next 

<<
Mostly misc code cleanups in various board ports and adding support for a
new MPC85xx board - ppa8548.
>>
parents db8ff907 12c7e8f6

Documentation/devicetree/bindings/crypto/fsl-sec4.txt

+9 −3
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@@ -54,8 +54,13 @@ PROPERTIES 
   - compatible

      Usage: required

      Value type: <string>

      Definition: Must include "fsl,sec-v4.0". Also includes SEC

           ERA versions (optional) with which the device is compatible.

      Definition: Must include "fsl,sec-v4.0"



   - fsl,sec-era

      Usage: optional

      Value type: <u32>

      Definition: A standard property. Define the 'ERA' of the SEC

          device.



   - #address-cells

       Usage: required
@@ -107,7 +112,8 @@ PROPERTIES 


EXAMPLE

	crypto@300000 {

		compatible = "fsl,sec-v4.0", "fsl,sec-era-v2.0";

		compatible = "fsl,sec-v4.0";

		fsl,sec-era = <0x2>;

		#address-cells = <1>;

		#size-cells = <1>;

		reg = <0x300000 0x10000>;

Documentation/devicetree/bindings/powerpc/fsl/guts.txt

+12 −1
Original line number Diff line number Diff line
@@ -17,9 +17,20 @@ Recommended properties: 
   contains a functioning "reset control register" (i.e. the board

   is wired to reset upon setting the HRESET_REQ bit in this register).



Example:

 - fsl,liodn-bits : Indicates the number of defined bits in the LIODN

   registers, for those SOCs that have a PAMU device.



Examples:

	global-utilities@e0000 {	/* global utilities block */

		compatible = "fsl,mpc8548-guts";

		reg = <e0000 1000>;

		fsl,has-rstcr;

	};



	guts: global-utilities@e0000 {

		compatible = "fsl,qoriq-device-config-1.0";

		reg = <0xe0000 0xe00>;

		fsl,has-rstcr;

		#sleep-cells = <1>;

		fsl,liodn-bits = <12>;

	};

Documentation/devicetree/bindings/powerpc/fsl/pamu.txt

0 → 100644
+140 −0
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Freescale Peripheral Management Access Unit (PAMU) Device Tree Binding



DESCRIPTION



The PAMU is an I/O MMU that provides device-to-memory access control and

address translation capabilities.



Required properties:



- compatible	: <string>

		  First entry is a version-specific string, such as

		  "fsl,pamu-v1.0".  The second is "fsl,pamu".

- ranges	: <prop-encoded-array>

		  A standard property. Utilized to describe the memory mapped

		  I/O space utilized by the controller.  The size should

		  be set to the total size of the register space of all

		  physically present PAMU controllers.  For example, for

		  PAMU v1.0, on an SOC that has five PAMU devices, the size

		  is 0x5000.

- interrupts	: <prop-encoded-array>

		  Interrupt mappings.  The first tuple is the normal PAMU

		  interrupt, used for reporting access violations.  The second

		  is for PAMU hardware errors, such as PAMU operation errors

		  and ECC errors.

- #address-cells: <u32>

		  A standard property.

- #size-cells	: <u32>

		  A standard property.



Optional properties:

- reg		: <prop-encoded-array>

		  A standard property.   It represents the CCSR registers of

		  all child PAMUs combined.  Include it to provide support

		  for legacy drivers.

- interrupt-parent : <phandle>

		  Phandle to interrupt controller



Child nodes:



Each child node represents one PAMU controller.  Each SOC device that is

connected to a specific PAMU device should have a "fsl,pamu-phandle" property

that links to the corresponding specific child PAMU controller.



- reg		: <prop-encoded-array>

		  A standard property.  Specifies the physical address and

		  length (relative to the parent 'ranges' property) of this

		  PAMU controller's configuration registers.  The size should

		  be set to the size of this PAMU controllers's register space.

		  For PAMU v1.0, this size is 0x1000.

- fsl,primary-cache-geometry

		: <prop-encoded-array>

		  Two cells that specify the geometry of the primary PAMU

		  cache.  The first is the number of cache lines, and the

		  second is the number of "ways".  For direct-mapped caches,

		  specify a value of 1.

- fsl,secondary-cache-geometry

		: <prop-encoded-array>

		  Two cells that specify the geometry of the secondary PAMU

		  cache.  The first is the number of cache lines, and the

		  second is the number of "ways".  For direct-mapped caches,

		  specify a value of 1.



Device nodes:



Devices that have LIODNs need to specify links to the parent PAMU controller

(the actual PAMU controller that this device is connected to) and a pointer to

the LIODN register, if applicable.



- fsl,iommu-parent

		: <phandle>

		Phandle to the single, specific PAMU controller node to which

		this device is connect.  The PAMU topology is represented in

		the device tree to assist code that dynamically determines the

		best LIODN values to minimize PAMU cache thrashing.



- fsl,liodn-reg : <prop-encoded-array>

		  Two cells that specify the location of the LIODN register

		  for this device.  Required for devices that have a single

		  LIODN.  The first cell is a phandle to a node that contains

		  the registers where the LIODN is to be set.  The second is

		  the offset from the first "reg" resource of the node where

		  the specific LIODN register is located.





Example:



	iommu@20000 {

		compatible = "fsl,pamu-v1.0", "fsl,pamu";

		reg = <0x20000 0x5000>;

		ranges = <0 0x20000 0x5000>;

		#address-cells = <1>;

		#size-cells = <1>;

		interrupts = <

			24 2 0 0

			16 2 1 30>;



		pamu0: pamu@0 {

			reg = <0 0x1000>;

			fsl,primary-cache-geometry = <32 1>;

			fsl,secondary-cache-geometry = <128 2>;

		};



		pamu1: pamu@1000 {

			reg = <0x1000 0x1000>;

			fsl,primary-cache-geometry = <32 1>;

			fsl,secondary-cache-geometry = <128 2>;

		};



		pamu2: pamu@2000 {

			reg = <0x2000 0x1000>;

			fsl,primary-cache-geometry = <32 1>;

			fsl,secondary-cache-geometry = <128 2>;

		};



		pamu3: pamu@3000 {

			reg = <0x3000 0x1000>;

			fsl,primary-cache-geometry = <32 1>;

			fsl,secondary-cache-geometry = <128 2>;

		};



		pamu4: pamu@4000 {

			reg = <0x4000 0x1000>;

			fsl,primary-cache-geometry = <32 1>;

			fsl,secondary-cache-geometry = <128 2>;

		};

	};



	guts: global-utilities@e0000 {

		compatible = "fsl,qoriq-device-config-1.0";

		reg = <0xe0000 0xe00>;

		fsl,has-rstcr;

		#sleep-cells = <1>;

		fsl,liodn-bits = <12>;

	};



/include/ "qoriq-dma-0.dtsi"

	dma@100300 {

		fsl,iommu-parent = <&pamu0>;

		fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */

	};

arch/powerpc/boot/dts/bsc9131rdb.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -126,7 +126,7 @@ 
		};

	};



	sdhci@2e000 {

	sdhc@2e000 {

		status = "disabled";

	};

arch/powerpc/boot/dts/fsl/p1010si-post.dtsi

+2 −2
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@@ -41,7 +41,7 @@ 


/* controller at 0x9000 */

&pci0 {

	compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";

	compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3";

	device_type = "pci";

	#size-cells = <2>;

	#address-cells = <3>;
@@ -69,7 +69,7 @@ 


/* controller at 0xa000 */

&pci1 {

	compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";

	compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3";

	device_type = "pci";

	#size-cells = <2>;

	#address-cells = <3>;