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Commit 8747f363 authored by Gavin Shan's avatar Gavin Shan Committed by Benjamin Herrenschmidt
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powerpc/eeh: EEH backend for P7IOC



For EEH on PowerNV platform, the overall architecture is different
from that on pSeries platform. In order to support multiple I/O chips
in future, we split EEH to 3 layers for PowerNV platform: EEH core,
platform layer, I/O layer. It would give EEH implementation on PowerNV
platform much more flexibility in future.

The patch adds the EEH backend for P7IOC.

Signed-off-by: default avatarGavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 23773230
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+1 −0
Original line number Original line Diff line number Diff line
@@ -3,3 +3,4 @@ obj-y += opal-rtc.o opal-nvram.o


obj-$(CONFIG_SMP)	+= smp.o
obj-$(CONFIG_SMP)	+= smp.o
obj-$(CONFIG_PCI)	+= pci.o pci-p5ioc2.o pci-ioda.o
obj-$(CONFIG_PCI)	+= pci.o pci-p5ioc2.o pci-ioda.o
obj-$(CONFIG_EEH)	+= eeh-ioda.o
+45 −0
Original line number Original line Diff line number Diff line
/*
 * The file intends to implement the functions needed by EEH, which is
 * built on IODA compliant chip. Actually, lots of functions related
 * to EEH would be built based on the OPAL APIs.
 *
 * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2013.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/bootmem.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/msi.h>
#include <linux/pci.h>
#include <linux/string.h>

#include <asm/eeh.h>
#include <asm/eeh_event.h>
#include <asm/io.h>
#include <asm/iommu.h>
#include <asm/msi_bitmap.h>
#include <asm/opal.h>
#include <asm/pci-bridge.h>
#include <asm/ppc-pci.h>
#include <asm/tce.h>

#include "powernv.h"
#include "pci.h"

struct pnv_eeh_ops ioda_eeh_ops = {
	.post_init		= NULL,
	.set_option		= NULL,
	.get_state		= NULL,
	.reset			= NULL,
	.get_log		= NULL,
	.configure_bridge	= NULL,
	.next_error		= NULL
};
+23 −0
Original line number Original line Diff line number Diff line
@@ -66,15 +66,35 @@ struct pnv_ioda_pe {
	struct list_head	list;
	struct list_head	list;
};
};


/* IOC dependent EEH operations */
#ifdef CONFIG_EEH
struct pnv_eeh_ops {
	int (*post_init)(struct pci_controller *hose);
	int (*set_option)(struct eeh_pe *pe, int option);
	int (*get_state)(struct eeh_pe *pe);
	int (*reset)(struct eeh_pe *pe, int option);
	int (*get_log)(struct eeh_pe *pe, int severity,
		       char *drv_log, unsigned long len);
	int (*configure_bridge)(struct eeh_pe *pe);
	int (*next_error)(struct eeh_pe **pe);
};
#endif /* CONFIG_EEH */

struct pnv_phb {
struct pnv_phb {
	struct pci_controller	*hose;
	struct pci_controller	*hose;
	enum pnv_phb_type	type;
	enum pnv_phb_type	type;
	enum pnv_phb_model	model;
	enum pnv_phb_model	model;
	u64			hub_id;
	u64			opal_id;
	u64			opal_id;
	void __iomem		*regs;
	void __iomem		*regs;
	int			initialized;
	int			initialized;
	spinlock_t		lock;
	spinlock_t		lock;


#ifdef CONFIG_EEH
	struct pnv_eeh_ops	*eeh_ops;
	int			eeh_enabled;
#endif

#ifdef CONFIG_PCI_MSI
#ifdef CONFIG_PCI_MSI
	unsigned int		msi_base;
	unsigned int		msi_base;
	unsigned int		msi32_support;
	unsigned int		msi32_support;
@@ -150,6 +170,9 @@ struct pnv_phb {
};
};


extern struct pci_ops pnv_pci_ops;
extern struct pci_ops pnv_pci_ops;
#ifdef CONFIG_EEH
extern struct pnv_eeh_ops ioda_eeh_ops;
#endif


extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
				      void *tce_mem, u64 tce_size,
				      void *tce_mem, u64 tce_size,