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Commit 85e3adb4 authored by Deepak Katragadda's avatar Deepak Katragadda Committed by Jeevan Shriram
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clk: msm: clock-alpha-pll: Program the fabia PLL calibration register 



Add programming the PLL_CAL_L_VAL register to the fabia PLL
set_rate sequence. This is required on MSMCOBALT v1 as a
workaround.

CRs-Fixed: 1016938
Change-Id: I298acf633228b2c565736bf7bfd446d96f4e1983
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent d4202a68

drivers/clk/msm/clock-alpha-pll.c

+7 −0
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@ 
#define FABIA_TEST_CTL_LO_REG(pll)	(*pll->base + pll->offset + 0x1c)

#define FABIA_TEST_CTL_HI_REG(pll)	(*pll->base + pll->offset + 0x20)

#define FABIA_L_REG(pll)		(*pll->base + pll->offset + 0x4)

#define FABIA_CAL_L_VAL(pll)		(*pll->base + pll->offset + 0x8)

#define FABIA_FRAC_REG(pll)		(*pll->base + pll->offset + 0x38)

#define FABIA_PLL_OPMODE(pll)		(*pll->base + pll->offset + 0x2c)
@@ -963,6 +964,12 @@ static int fabia_alpha_pll_set_rate(struct clk *c, unsigned long rate) 
	spin_lock_irqsave(&c->lock, flags);

	/* Set the new L value */

	writel_relaxed(l_val, FABIA_L_REG(pll));

	/*

	 * pll_cal_l_val is set to pll_l_val on MOST targets. Set it

	 * explicitly here for PLL out-of-reset calibration to work

	 * without a glitch on all of them.

	 */

	writel_relaxed(l_val, FABIA_CAL_L_VAL(pll));

	writel_relaxed(a_val, FABIA_FRAC_REG(pll));



	alpha_pll_dynamic_update(pll);