Loading drivers/gpu/drm/msm/dba_bridge.c +6 −1 Original line number Diff line number Diff line Loading @@ -51,6 +51,7 @@ struct dba_bridge { u32 num_of_input_lanes; bool pluggable; u32 panel_count; bool cont_splash_enabled; }; #define to_dba_bridge(x) container_of((x), struct dba_bridge, base) Loading Loading @@ -324,6 +325,7 @@ struct drm_bridge *dba_bridge_init(struct drm_device *dev, bridge->panel_count = data->panel_count; bridge->base.funcs = &_dba_bridge_ops; bridge->base.encoder = encoder; bridge->cont_splash_enabled = data->cont_splash_enabled; rc = drm_bridge_attach(dev, &bridge->base); if (rc) { Loading @@ -339,7 +341,10 @@ struct drm_bridge *dba_bridge_init(struct drm_device *dev, encoder->bridge = &bridge->base; } if (!bridge->pluggable) { /* If early splash has enabled bridge chip in bootloader, * below call should be skipped. */ if (!bridge->pluggable && !bridge->cont_splash_enabled) { if (bridge->ops.power_on) bridge->ops.power_on(bridge->dba_ctx, true, 0); if (bridge->ops.check_hpd) Loading drivers/gpu/drm/msm/dba_bridge.h +2 −1 Original line number Diff line number Diff line /* * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -44,6 +44,7 @@ struct dba_bridge_init { struct drm_bridge *precede_bridge; bool pluggable; u32 panel_count; bool cont_splash_enabled; }; /** Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +22 −13 Original line number Diff line number Diff line Loading @@ -1598,7 +1598,7 @@ exit: * * Return: error code. */ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl) int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool cont_splash_enabled) { int rc = 0; Loading @@ -1615,6 +1615,7 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl) goto error; } if (!cont_splash_enabled) { dsi_ctrl->hw.ops.setup_lane_map(&dsi_ctrl->hw, &dsi_ctrl->host_config.lane_map); Loading @@ -1638,13 +1639,15 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl) dsi_ctrl->hw.ops.set_video_timing(&dsi_ctrl->hw, &dsi_ctrl->host_config.video_timing); } } dsi_ctrl->hw.ops.enable_status_interrupts(&dsi_ctrl->hw, 0x0); dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0x0); /* Perform a soft reset before enabling dsi controller */ /* Perform a soft reset before enabling dsi controller * But skip the reset if dsi is enabled in bootloader. */ if (!cont_splash_enabled) dsi_ctrl->hw.ops.soft_reset(&dsi_ctrl->hw); pr_debug("[DSI_%d]Host initialization complete\n", dsi_ctrl->index); dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, 0x1); Loading Loading @@ -1967,6 +1970,12 @@ error: return rc; } void dsi_ctrl_update_power_state(struct dsi_ctrl *dsi_ctrl, enum dsi_power_state state) { dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_POWER_STATE_CHANGE, state); } /** * dsi_ctrl_set_tpg_state() - enable/disable test pattern on the controller * @dsi_ctrl: DSI controller handle. Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h +13 −2 Original line number Diff line number Diff line /* * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * Copyright (c) 2015-2016, 2018 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -331,6 +331,7 @@ int dsi_ctrl_phy_sw_reset(struct dsi_ctrl *dsi_ctrl); /** * dsi_ctrl_host_init() - Initialize DSI host hardware. * @dsi_ctrl: DSI controller handle. * @cont_splash_enabled: Flag for DSI splash enabled in bootloader. * * Initializes DSI controller hardware with host configuration provided by * dsi_ctrl_update_host_config(). Initialization can be performed only during Loading @@ -339,7 +340,7 @@ int dsi_ctrl_phy_sw_reset(struct dsi_ctrl *dsi_ctrl); * * Return: error code. */ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl); int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool cont_splash_enabled); /** * dsi_ctrl_host_deinit() - De-Initialize DSI host hardware. Loading Loading @@ -403,6 +404,16 @@ int dsi_ctrl_cmd_tx_trigger(struct dsi_ctrl *dsi_ctrl, u32 flags); int dsi_ctrl_set_power_state(struct dsi_ctrl *dsi_ctrl, enum dsi_power_state state); /** * dsi_ctrl_update_power_state() - update power state for dsi controller * @dsi_ctrl: DSI controller handle. * @state: Power state. * * Update power state for DSI controller. * */ void dsi_ctrl_update_power_state(struct dsi_ctrl *dsi_ctrl, enum dsi_power_state state); /** * dsi_ctrl_set_cmd_engine_state() - set command engine state * @dsi_ctrl: DSI Controller handle. Loading drivers/gpu/drm/msm/dsi-staging/dsi_display.c +115 −16 Original line number Diff line number Diff line Loading @@ -174,6 +174,11 @@ static int dsi_display_ctrl_power_on(struct dsi_display *display) int i; struct dsi_display_ctrl *ctrl; if (display->cont_splash_enabled) { pr_debug("skip ctrl power on\n"); return rc; } /* Sequence does not matter for split dsi usecases */ for (i = 0; i < display->ctrl_count; i++) { Loading Loading @@ -460,7 +465,8 @@ static int dsi_display_ctrl_init(struct dsi_display *display) for (i = 0 ; i < display->ctrl_count; i++) { ctrl = &display->ctrl[i]; rc = dsi_ctrl_host_init(ctrl->ctrl); rc = dsi_ctrl_host_init(ctrl->ctrl, display->cont_splash_enabled); if (rc) { pr_err("[%s] failed to init host_%d, rc=%d\n", display->name, i, rc); Loading Loading @@ -720,7 +726,7 @@ static int dsi_display_phy_enable(struct dsi_display *display) rc = dsi_phy_enable(m_ctrl->phy, &display->config, m_src, true); true, display->cont_splash_enabled); if (rc) { pr_err("[%s] failed to enable DSI PHY, rc=%d\n", display->name, rc); Loading @@ -735,7 +741,7 @@ static int dsi_display_phy_enable(struct dsi_display *display) rc = dsi_phy_enable(ctrl->phy, &display->config, DSI_PLL_SOURCE_NON_NATIVE, true); true, display->cont_splash_enabled); if (rc) { pr_err("[%s] failed to enable DSI PHY, rc=%d\n", display->name, rc); Loading Loading @@ -848,6 +854,11 @@ static int dsi_display_phy_sw_reset(struct dsi_display *display) int i; struct dsi_display_ctrl *m_ctrl, *ctrl; if (display->cont_splash_enabled) { pr_debug("skip phy sw reset\n"); return 0; } m_ctrl = &display->ctrl[display->cmd_master_idx]; rc = dsi_ctrl_phy_sw_reset(m_ctrl->ctrl); Loading Loading @@ -1748,6 +1759,45 @@ static int _dsi_display_dev_deinit(struct dsi_display *display) return rc; } /* * _dsi_display_config_ctrl_for_splash * * Config ctrl engine for DSI display. * @display: Handle to the display * Returns: Zero on success */ static int _dsi_display_config_ctrl_for_splash(struct dsi_display *display) { int rc = 0; if (!display) { pr_err("Invalid params\n"); return -EINVAL; } if (display->config.panel_mode == DSI_OP_VIDEO_MODE) { rc = dsi_display_vid_engine_enable(display); if (rc) { pr_err("[%s]failed to enable video engine, rc=%d\n", display->name, rc); goto error_out; } } else if (display->config.panel_mode == DSI_OP_CMD_MODE) { rc = dsi_display_cmd_engine_enable(display); if (rc) { pr_err("[%s]failed to enable cmd engine, rc=%d\n", display->name, rc); goto error_out; } } else { pr_err("[%s] Invalid configuration\n", display->name); rc = -EINVAL; } error_out: return rc; } /** * dsi_display_bind - bind dsi device with controlling device * @dev: Pointer to base of platform device Loading Loading @@ -2141,6 +2191,8 @@ int dsi_display_drm_bridge_init(struct dsi_display *display, init_data.num_of_input_lanes = num_of_lanes; init_data.precede_bridge = precede_bridge; init_data.panel_count = display->panel_count; init_data.cont_splash_enabled = display->cont_splash_enabled; dba_bridge = dba_bridge_init(display->drm_dev, enc, &init_data); if (IS_ERR_OR_NULL(dba_bridge)) { Loading Loading @@ -2451,14 +2503,16 @@ int dsi_display_prepare(struct dsi_display *display) mutex_lock(&display->display_lock); if (!display->cont_splash_enabled) { for (i = 0; i < display->panel_count; i++) { rc = dsi_panel_pre_prepare(display->panel[i]); if (rc) { SDE_ERROR("[%s] panel pre-prepare failed, rc=%d\n", SDE_ERROR("[%s]pre-prepare failed, rc=%d\n", display->name, rc); goto error_panel_post_unprep; } } } rc = dsi_display_ctrl_power_on(display); if (rc) { Loading Loading @@ -2523,7 +2577,6 @@ int dsi_display_prepare(struct dsi_display *display) goto error_panel_unprep; } } goto error; error_panel_unprep: Loading Loading @@ -2559,6 +2612,12 @@ int dsi_display_enable(struct dsi_display *display) return -EINVAL; } if (display->cont_splash_enabled) { _dsi_display_config_ctrl_for_splash(display); display->cont_splash_enabled = false; return 0; } mutex_lock(&display->display_lock); for (i = 0; i < display->panel_count; i++) { Loading Loading @@ -2755,6 +2814,46 @@ int dsi_display_unprepare(struct dsi_display *display) return rc; } int dsi_dsiplay_setup_splash_resource(struct dsi_display *display) { int ret = 0, i = 0; struct dsi_display_ctrl *ctrl; if (!display) return -EINVAL; for (i = 0; i < display->ctrl_count; i++) { ctrl = &display->ctrl[i]; if (!ctrl) return -EINVAL; dsi_pwr_enable_regulator(&ctrl->ctrl->pwr_info.host_pwr, true); dsi_pwr_enable_regulator(&ctrl->ctrl->pwr_info.digital, true); dsi_pwr_enable_regulator(&ctrl->phy->pwr_info.phy_pwr, true); ret = dsi_clk_enable_core_clks(&ctrl->ctrl->clk_info.core_clks, true); if (ret) { SDE_ERROR("failed to set core clk for dsi, ret = %d\n", ret); return -EINVAL; } ret = dsi_clk_enable_link_clks(&ctrl->ctrl->clk_info.link_clks, true); if (ret) { SDE_ERROR("failed to set link clk for dsi, ret = %d\n", ret); return -EINVAL; } dsi_ctrl_update_power_state(ctrl->ctrl, DSI_CTRL_POWER_LINK_CLK_ON); } return ret; } static int __init dsi_display_register(void) { dsi_phy_drv_register(); Loading Loading
drivers/gpu/drm/msm/dba_bridge.c +6 −1 Original line number Diff line number Diff line Loading @@ -51,6 +51,7 @@ struct dba_bridge { u32 num_of_input_lanes; bool pluggable; u32 panel_count; bool cont_splash_enabled; }; #define to_dba_bridge(x) container_of((x), struct dba_bridge, base) Loading Loading @@ -324,6 +325,7 @@ struct drm_bridge *dba_bridge_init(struct drm_device *dev, bridge->panel_count = data->panel_count; bridge->base.funcs = &_dba_bridge_ops; bridge->base.encoder = encoder; bridge->cont_splash_enabled = data->cont_splash_enabled; rc = drm_bridge_attach(dev, &bridge->base); if (rc) { Loading @@ -339,7 +341,10 @@ struct drm_bridge *dba_bridge_init(struct drm_device *dev, encoder->bridge = &bridge->base; } if (!bridge->pluggable) { /* If early splash has enabled bridge chip in bootloader, * below call should be skipped. */ if (!bridge->pluggable && !bridge->cont_splash_enabled) { if (bridge->ops.power_on) bridge->ops.power_on(bridge->dba_ctx, true, 0); if (bridge->ops.check_hpd) Loading
drivers/gpu/drm/msm/dba_bridge.h +2 −1 Original line number Diff line number Diff line /* * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -44,6 +44,7 @@ struct dba_bridge_init { struct drm_bridge *precede_bridge; bool pluggable; u32 panel_count; bool cont_splash_enabled; }; /** Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +22 −13 Original line number Diff line number Diff line Loading @@ -1598,7 +1598,7 @@ exit: * * Return: error code. */ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl) int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool cont_splash_enabled) { int rc = 0; Loading @@ -1615,6 +1615,7 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl) goto error; } if (!cont_splash_enabled) { dsi_ctrl->hw.ops.setup_lane_map(&dsi_ctrl->hw, &dsi_ctrl->host_config.lane_map); Loading @@ -1638,13 +1639,15 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl) dsi_ctrl->hw.ops.set_video_timing(&dsi_ctrl->hw, &dsi_ctrl->host_config.video_timing); } } dsi_ctrl->hw.ops.enable_status_interrupts(&dsi_ctrl->hw, 0x0); dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0x0); /* Perform a soft reset before enabling dsi controller */ /* Perform a soft reset before enabling dsi controller * But skip the reset if dsi is enabled in bootloader. */ if (!cont_splash_enabled) dsi_ctrl->hw.ops.soft_reset(&dsi_ctrl->hw); pr_debug("[DSI_%d]Host initialization complete\n", dsi_ctrl->index); dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, 0x1); Loading Loading @@ -1967,6 +1970,12 @@ error: return rc; } void dsi_ctrl_update_power_state(struct dsi_ctrl *dsi_ctrl, enum dsi_power_state state) { dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_POWER_STATE_CHANGE, state); } /** * dsi_ctrl_set_tpg_state() - enable/disable test pattern on the controller * @dsi_ctrl: DSI controller handle. Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h +13 −2 Original line number Diff line number Diff line /* * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * Copyright (c) 2015-2016, 2018 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -331,6 +331,7 @@ int dsi_ctrl_phy_sw_reset(struct dsi_ctrl *dsi_ctrl); /** * dsi_ctrl_host_init() - Initialize DSI host hardware. * @dsi_ctrl: DSI controller handle. * @cont_splash_enabled: Flag for DSI splash enabled in bootloader. * * Initializes DSI controller hardware with host configuration provided by * dsi_ctrl_update_host_config(). Initialization can be performed only during Loading @@ -339,7 +340,7 @@ int dsi_ctrl_phy_sw_reset(struct dsi_ctrl *dsi_ctrl); * * Return: error code. */ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl); int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool cont_splash_enabled); /** * dsi_ctrl_host_deinit() - De-Initialize DSI host hardware. Loading Loading @@ -403,6 +404,16 @@ int dsi_ctrl_cmd_tx_trigger(struct dsi_ctrl *dsi_ctrl, u32 flags); int dsi_ctrl_set_power_state(struct dsi_ctrl *dsi_ctrl, enum dsi_power_state state); /** * dsi_ctrl_update_power_state() - update power state for dsi controller * @dsi_ctrl: DSI controller handle. * @state: Power state. * * Update power state for DSI controller. * */ void dsi_ctrl_update_power_state(struct dsi_ctrl *dsi_ctrl, enum dsi_power_state state); /** * dsi_ctrl_set_cmd_engine_state() - set command engine state * @dsi_ctrl: DSI Controller handle. Loading
drivers/gpu/drm/msm/dsi-staging/dsi_display.c +115 −16 Original line number Diff line number Diff line Loading @@ -174,6 +174,11 @@ static int dsi_display_ctrl_power_on(struct dsi_display *display) int i; struct dsi_display_ctrl *ctrl; if (display->cont_splash_enabled) { pr_debug("skip ctrl power on\n"); return rc; } /* Sequence does not matter for split dsi usecases */ for (i = 0; i < display->ctrl_count; i++) { Loading Loading @@ -460,7 +465,8 @@ static int dsi_display_ctrl_init(struct dsi_display *display) for (i = 0 ; i < display->ctrl_count; i++) { ctrl = &display->ctrl[i]; rc = dsi_ctrl_host_init(ctrl->ctrl); rc = dsi_ctrl_host_init(ctrl->ctrl, display->cont_splash_enabled); if (rc) { pr_err("[%s] failed to init host_%d, rc=%d\n", display->name, i, rc); Loading Loading @@ -720,7 +726,7 @@ static int dsi_display_phy_enable(struct dsi_display *display) rc = dsi_phy_enable(m_ctrl->phy, &display->config, m_src, true); true, display->cont_splash_enabled); if (rc) { pr_err("[%s] failed to enable DSI PHY, rc=%d\n", display->name, rc); Loading @@ -735,7 +741,7 @@ static int dsi_display_phy_enable(struct dsi_display *display) rc = dsi_phy_enable(ctrl->phy, &display->config, DSI_PLL_SOURCE_NON_NATIVE, true); true, display->cont_splash_enabled); if (rc) { pr_err("[%s] failed to enable DSI PHY, rc=%d\n", display->name, rc); Loading Loading @@ -848,6 +854,11 @@ static int dsi_display_phy_sw_reset(struct dsi_display *display) int i; struct dsi_display_ctrl *m_ctrl, *ctrl; if (display->cont_splash_enabled) { pr_debug("skip phy sw reset\n"); return 0; } m_ctrl = &display->ctrl[display->cmd_master_idx]; rc = dsi_ctrl_phy_sw_reset(m_ctrl->ctrl); Loading Loading @@ -1748,6 +1759,45 @@ static int _dsi_display_dev_deinit(struct dsi_display *display) return rc; } /* * _dsi_display_config_ctrl_for_splash * * Config ctrl engine for DSI display. * @display: Handle to the display * Returns: Zero on success */ static int _dsi_display_config_ctrl_for_splash(struct dsi_display *display) { int rc = 0; if (!display) { pr_err("Invalid params\n"); return -EINVAL; } if (display->config.panel_mode == DSI_OP_VIDEO_MODE) { rc = dsi_display_vid_engine_enable(display); if (rc) { pr_err("[%s]failed to enable video engine, rc=%d\n", display->name, rc); goto error_out; } } else if (display->config.panel_mode == DSI_OP_CMD_MODE) { rc = dsi_display_cmd_engine_enable(display); if (rc) { pr_err("[%s]failed to enable cmd engine, rc=%d\n", display->name, rc); goto error_out; } } else { pr_err("[%s] Invalid configuration\n", display->name); rc = -EINVAL; } error_out: return rc; } /** * dsi_display_bind - bind dsi device with controlling device * @dev: Pointer to base of platform device Loading Loading @@ -2141,6 +2191,8 @@ int dsi_display_drm_bridge_init(struct dsi_display *display, init_data.num_of_input_lanes = num_of_lanes; init_data.precede_bridge = precede_bridge; init_data.panel_count = display->panel_count; init_data.cont_splash_enabled = display->cont_splash_enabled; dba_bridge = dba_bridge_init(display->drm_dev, enc, &init_data); if (IS_ERR_OR_NULL(dba_bridge)) { Loading Loading @@ -2451,14 +2503,16 @@ int dsi_display_prepare(struct dsi_display *display) mutex_lock(&display->display_lock); if (!display->cont_splash_enabled) { for (i = 0; i < display->panel_count; i++) { rc = dsi_panel_pre_prepare(display->panel[i]); if (rc) { SDE_ERROR("[%s] panel pre-prepare failed, rc=%d\n", SDE_ERROR("[%s]pre-prepare failed, rc=%d\n", display->name, rc); goto error_panel_post_unprep; } } } rc = dsi_display_ctrl_power_on(display); if (rc) { Loading Loading @@ -2523,7 +2577,6 @@ int dsi_display_prepare(struct dsi_display *display) goto error_panel_unprep; } } goto error; error_panel_unprep: Loading Loading @@ -2559,6 +2612,12 @@ int dsi_display_enable(struct dsi_display *display) return -EINVAL; } if (display->cont_splash_enabled) { _dsi_display_config_ctrl_for_splash(display); display->cont_splash_enabled = false; return 0; } mutex_lock(&display->display_lock); for (i = 0; i < display->panel_count; i++) { Loading Loading @@ -2755,6 +2814,46 @@ int dsi_display_unprepare(struct dsi_display *display) return rc; } int dsi_dsiplay_setup_splash_resource(struct dsi_display *display) { int ret = 0, i = 0; struct dsi_display_ctrl *ctrl; if (!display) return -EINVAL; for (i = 0; i < display->ctrl_count; i++) { ctrl = &display->ctrl[i]; if (!ctrl) return -EINVAL; dsi_pwr_enable_regulator(&ctrl->ctrl->pwr_info.host_pwr, true); dsi_pwr_enable_regulator(&ctrl->ctrl->pwr_info.digital, true); dsi_pwr_enable_regulator(&ctrl->phy->pwr_info.phy_pwr, true); ret = dsi_clk_enable_core_clks(&ctrl->ctrl->clk_info.core_clks, true); if (ret) { SDE_ERROR("failed to set core clk for dsi, ret = %d\n", ret); return -EINVAL; } ret = dsi_clk_enable_link_clks(&ctrl->ctrl->clk_info.link_clks, true); if (ret) { SDE_ERROR("failed to set link clk for dsi, ret = %d\n", ret); return -EINVAL; } dsi_ctrl_update_power_state(ctrl->ctrl, DSI_CTRL_POWER_LINK_CLK_ON); } return ret; } static int __init dsi_display_register(void) { dsi_phy_drv_register(); Loading