Merge "msm: mdss: dp: remove programming of maud/naud for audio" (8493ec68) · Commits · e / devices / android_kernel_sony_msm8998

drivers/video/fbdev/msm/mdss_dp.c

+79 −23

Original line number	Diff line number	Diff line
		@@ -898,8 +898,6 @@ static int dp_audio_info_setup(struct platform_device *pdev,
		}

		mdss_dp_audio_setup_sdps(&dp_ctrl->ctrl_io);
		mdss_dp_audio_set_sample_rate(&dp_ctrl->ctrl_io,
		dp_ctrl->link_rate, params->sample_rate_hz);
		mdss_dp_config_audio_acr_ctrl(&dp_ctrl->ctrl_io, dp_ctrl->link_rate);
		mdss_dp_set_safe_to_exit_level(&dp_ctrl->ctrl_io, dp_ctrl->lane_cnt);
		mdss_dp_audio_enable(&dp_ctrl->ctrl_io, true);
		@@ -1303,17 +1301,23 @@ int mdss_dp_on(struct mdss_panel_data *pdata)
		return mdss_dp_on_hpd(dp_drv);
		}

		static void mdss_dp_reset_test_data(struct mdss_dp_drv_pdata *dp)
		static inline void mdss_dp_reset_test_data(struct mdss_dp_drv_pdata *dp)
		{
		dp->test_data = (const struct dpcd_test_request){ 0 };
		}

		static bool mdss_dp_is_link_training_requested(struct mdss_dp_drv_pdata *dp)
		static inline bool mdss_dp_is_link_status_updated(struct mdss_dp_drv_pdata *dp)
		{
		return dp->link_status.link_status_updated;
		}

		static inline bool mdss_dp_is_link_training_requested(
		struct mdss_dp_drv_pdata *dp)
		{
		return (dp->test_data.test_requested == TEST_LINK_TRAINING);
		}

		static bool mdss_dp_soft_hpd_reset(struct mdss_dp_drv_pdata *dp)
		static inline bool mdss_dp_soft_hpd_reset(struct mdss_dp_drv_pdata *dp)
		{
		return mdss_dp_is_link_training_requested(dp) &&
		dp->alt_mode.dp_status.hpd_irq;
		@@ -2281,7 +2285,7 @@ end:
		* This function will send the test response to the sink but only after
		* any previous link training has been completed.
		*/
		static void mdss_dp_send_test_response(struct mdss_dp_drv_pdata *dp)
		static inline void mdss_dp_send_test_response(struct mdss_dp_drv_pdata *dp)
		{
		mutex_lock(&dp->train_mutex);
		mdss_dp_aux_send_test_response(dp);
		@@ -2318,24 +2322,59 @@ static int mdss_dp_hpd_irq_notify_clients(struct mdss_dp_drv_pdata *dp)
		}

		/**
		* mdss_dp_process_hpd_irq_high() - handle HPD IRQ transition to HIGH
		* mdss_dp_link_retraining() - initiates link retraining
		* @dp: Display Port Driver data
		*
		* This function will handle the HPD IRQ state transitions from HIGH to HIGH
		* or LOW to HIGH, indicating the start of a new test request.
		* This function will initiate link retraining by first notifying
		* DP clients and triggering DP shutdown, and then enabling DP after
		* notification is done successfully.
		*/
		static void mdss_dp_process_hpd_irq_high(struct mdss_dp_drv_pdata *dp)
		static inline void mdss_dp_link_retraining(struct mdss_dp_drv_pdata *dp)
		{
		pr_debug("enter: HPD IRQ High\n");
		if (mdss_dp_hpd_irq_notify_clients(dp))
		return;

		dp->hpd_irq_on = true;
		mdss_dp_on_irq(dp);
		}

		mdss_dp_aux_parse_sink_status_field(dp);
		/**
		* mdss_dp_process_link_status_update() - processes link status updates
		* @dp: Display Port Driver data
		*
		* This function will check for changes in the link status, e.g. clock
		* recovery done on all lanes, and trigger link training if there is a
		* failure/error on the link.
		*/
		static void mdss_dp_process_link_status_update(struct mdss_dp_drv_pdata *dp)
		{
		if (!mdss_dp_is_link_status_updated(dp) \|\|
		(mdss_dp_aux_channel_eq_done(dp) &&
		mdss_dp_aux_clock_recovery_done(dp)))
		return;

		pr_info("channel_eq_done = %d, clock_recovery_done = %d\n",
		mdss_dp_aux_channel_eq_done(dp),
		mdss_dp_aux_clock_recovery_done(dp));

		mdss_dp_link_retraining(dp);
		}

		/**
		* mdss_dp_process_link_training_request() - processes new training requests
		* @dp: Display Port Driver data
		*
		* This function will handle new link training requests that are initiated by
		* the sink. In particular, it will update the requested lane count and link
		* link rate, and then trigger the link retraining procedure.
		*/
		static void mdss_dp_process_link_training_request(struct mdss_dp_drv_pdata *dp)
		{
		if (!mdss_dp_is_link_training_requested(dp))
		return;

		if (mdss_dp_is_link_training_requested(dp)) {
		mdss_dp_send_test_response(dp);

		pr_info("%s requested: link rate = 0x%x, lane count = 0x%x\n",
		pr_info("%s link rate = 0x%x, lane count = 0x%x\n",
		mdss_dp_get_test_name(TEST_LINK_TRAINING),
		dp->test_data.test_link_rate,
		dp->test_data.test_lane_count);
		@@ -2343,12 +2382,29 @@ static void mdss_dp_process_hpd_irq_high(struct mdss_dp_drv_pdata *dp)
		dp->test_data.test_lane_count;
		dp->link_rate = dp->test_data.test_link_rate;

		if (mdss_dp_hpd_irq_notify_clients(dp))
		return;

		mdss_dp_on_irq(dp);
		mdss_dp_link_retraining(dp);
		}

		/**
		* mdss_dp_process_hpd_irq_high() - handle HPD IRQ transition to HIGH
		* @dp: Display Port Driver data
		*
		* This function will handle the HPD IRQ state transitions from LOW to HIGH
		* (including cases when there are back to back HPD IRQ HIGH) indicating
		* the start of a new link training request or sink status update.
		*/
		static void mdss_dp_process_hpd_irq_high(struct mdss_dp_drv_pdata *dp)
		{
		pr_debug("enter: HPD IRQ High\n");

		dp->hpd_irq_on = true;

		mdss_dp_aux_parse_sink_status_field(dp);

		mdss_dp_process_link_training_request(dp);

		mdss_dp_process_link_status_update(dp);

		mdss_dp_reset_test_data(dp);

		pr_debug("done\n");

drivers/video/fbdev/msm/mdss_dp.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -585,5 +585,7 @@ int mdss_dp_aux_set_sink_power_state(struct mdss_dp_drv_pdata *ep, char state);
		void mdss_dp_aux_send_test_response(struct mdss_dp_drv_pdata *ep);
		void mdss_dp_get_hdcp_data(struct device dev);
		int mdss_dp_hdcp2p2_init(struct mdss_dp_drv_pdata *dp_drv);
		bool mdss_dp_aux_clock_recovery_done(struct mdss_dp_drv_pdata *ep);
		bool mdss_dp_aux_channel_eq_done(struct mdss_dp_drv_pdata *ep);

		#endif /* MDSS_DP_H */

drivers/video/fbdev/msm/mdss_dp_aux.c

+8 −8

Original line number	Diff line number	Diff line
		@@ -1238,7 +1238,7 @@ static int dp_train_pattern_set_write(struct mdss_dp_drv_pdata *ep,
		return dp_aux_write_buf(ep, 0x102, buf, 1, 0);
		}

		static int dp_sink_clock_recovery_done(struct mdss_dp_drv_pdata *ep)
		bool mdss_dp_aux_clock_recovery_done(struct mdss_dp_drv_pdata *ep)
		{
		u32 mask;
		u32 data;
		@@ -1259,12 +1259,12 @@ static int dp_sink_clock_recovery_done(struct mdss_dp_drv_pdata *ep)
		pr_debug("data=%x mask=%x\n", data, mask);
		data &= mask;
		if (data == mask) /* all done */
		return 1;
		return true;

		return 0;
		return false;
		}

		static int dp_sink_channel_eq_done(struct mdss_dp_drv_pdata *ep)
		bool mdss_dp_aux_channel_eq_done(struct mdss_dp_drv_pdata *ep)
		{
		u32 mask;
		u32 data;
		@@ -1293,9 +1293,9 @@ static int dp_sink_channel_eq_done(struct mdss_dp_drv_pdata *ep)

		data &= mask;
		if (data == mask)/* all done */
		return 1;
		return true;

		return 0;
		return false;
		}

		void dp_sink_train_set_adjust(struct mdss_dp_drv_pdata *ep)
		@@ -1446,7 +1446,7 @@ static int dp_start_link_train_1(struct mdss_dp_drv_pdata *ep)
		usleep_range(usleep_time, usleep_time);

		dp_link_status_read(ep, 6);
		if (dp_sink_clock_recovery_done(ep)) {
		if (mdss_dp_aux_clock_recovery_done(ep)) {
		ret = 0;
		break;
		}
		@@ -1499,7 +1499,7 @@ static int dp_start_link_train_2(struct mdss_dp_drv_pdata *ep)

		dp_link_status_read(ep, 6);

		if (dp_sink_channel_eq_done(ep)) {
		if (mdss_dp_aux_channel_eq_done(ep)) {
		ret = 0;
		break;
		}

drivers/video/fbdev/msm/mdss_dp_util.c

+0 −106

Original line number	Diff line number	Diff line
		@@ -27,10 +27,6 @@
		#define DP_LS_FREQ_162 162000000
		#define DP_LS_FREQ_270 270000000
		#define DP_LS_FREQ_540 540000000
		#define AUDIO_FREQ_32 32000
		#define AUDIO_FREQ_44_1 44100
		#define AUDIO_FREQ_48 48000
		#define DP_AUDIO_FREQ_COUNT 3

		enum mdss_dp_pin_assignment {
		PIN_ASSIGNMENT_A,
		@@ -55,68 +51,12 @@ static const char *mdss_dp_pin_name(u8 pin)
		}
		}

		static const uint32_t naud_value[DP_AUDIO_FREQ_COUNT][DP_AUDIO_FREQ_COUNT] = {
		{ 10125, 16875, 33750 },
		{ 5625, 9375, 18750 },
		{ 3375, 5625, 11250 }
		};

		static const uint32_t maud_rate[DP_AUDIO_FREQ_COUNT] = { 1024, 784, 512 };

		static const uint32_t audio_timing_rbr[DP_AUDIO_FREQ_COUNT] = {
		MMSS_DP_AUDIO_TIMING_RBR_32,
		MMSS_DP_AUDIO_TIMING_RBR_44,
		MMSS_DP_AUDIO_TIMING_RBR_48
		};

		static const uint32_t std_audio_freq_list[DP_AUDIO_FREQ_COUNT] = {
		AUDIO_FREQ_32,
		AUDIO_FREQ_44_1,
		AUDIO_FREQ_48
		};

		struct mdss_hw mdss_dp_hw = {
		.hw_ndx = MDSS_HW_EDP,
		.ptr = NULL,
		.irq_handler = dp_isr,
		};

		static int mdss_dp_get_rate_index(uint32_t rate)
		{
		int index = 0;

		switch (rate) {
		case DP_LS_FREQ_162:
		case AUDIO_FREQ_32:
		index = 0;
		break;
		case DP_LS_FREQ_270:
		case AUDIO_FREQ_44_1:
		index = 1;
		break;
		case DP_LS_FREQ_540:
		case AUDIO_FREQ_48:
		index = 2;
		break;
		default:
		index = 0;
		pr_err("unsupported rate\n");
		break;
		}

		return index;
		}

		static bool match_std_freq(uint32_t audio_freq, uint32_t std_freq)
		{
		int quotient = audio_freq / std_freq;

		if (quotient & (quotient - 1))
		return false;
		else
		return true;
		}

		/* DP retrieve ctrl HW version */
		u32 mdss_dp_get_ctrl_hw_version(struct dss_io_data *ctrl_io)
		{
		@@ -866,52 +806,6 @@ void mdss_dp_audio_setup_sdps(struct dss_io_data *ctrl_io)
		mdss_dp_audio_setup_isrc_sdp(ctrl_io);
		}

		void mdss_dp_audio_set_sample_rate(struct dss_io_data *ctrl_io,
		char dp_link_rate, uint32_t audio_freq)
		{
		uint32_t link_rate;
		uint32_t default_audio_freq = AUDIO_FREQ_32;
		int i, multiplier = 1;
		uint32_t maud_index, lrate_index, register_index, value;

		link_rate = (uint32_t)dp_link_rate * DP_LINK_RATE_MULTIPLIER;

		pr_debug("link_rate = %u, audio_freq = %u\n", link_rate, audio_freq);

		for (i = 0; i < DP_AUDIO_FREQ_COUNT; i++) {
		if (audio_freq % std_audio_freq_list[i])
		continue;

		if (match_std_freq(audio_freq, std_audio_freq_list[i])) {
		default_audio_freq = std_audio_freq_list[i];
		multiplier = audio_freq / default_audio_freq;
		break;
		}
		}

		pr_debug("default_audio_freq = %u, multiplier = %d\n",
		default_audio_freq, multiplier);

		lrate_index = mdss_dp_get_rate_index(link_rate);
		maud_index = mdss_dp_get_rate_index(default_audio_freq);

		pr_debug("lrate_index = %u, maud_index = %u, maud = %u, naud = %u\n",
		lrate_index, maud_index,
		maud_rate[maud_index] * multiplier,
		naud_value[maud_index][lrate_index]);

		register_index = mdss_dp_get_rate_index(default_audio_freq);
		value = ((maud_rate[maud_index] * multiplier) << 16) \|
		naud_value[maud_index][lrate_index];

		pr_debug("reg index = %d, offset = 0x%x, value = 0x%x\n",
		(int)register_index, audio_timing_rbr[register_index],
		value);

		writel_relaxed(value, ctrl_io->base +
		audio_timing_rbr[register_index]);
		}

		void mdss_dp_set_safe_to_exit_level(struct dss_io_data *ctrl_io,
		uint32_t lane_cnt)
		{