Loading arch/arm/boot/dts/qcom/sdm660-cdp.dtsi +59 −0 Original line number Diff line number Diff line Loading @@ -88,6 +88,65 @@ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; }; &sdhc_1 { /* device core power supply */ vdd-supply = <&pm660l_l4>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <200 570000>; /* device communication power supply */ vdd-io-supply = <&pm660_l8>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <200 325000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>; qcom,nonremovable; qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v"; status = "ok"; }; &sdhc_2 { /* device core power supply */ vdd-supply = <&pm660l_l5>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 900000>; /* device communication power supply */ vdd-io-supply = <&pm660l_l2>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <200 22000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; #address-cells = <0>; interrupt-parent = <&sdhc_2>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 125 0 1 &intc 0 221 0 2 &tlmm 54 0>; interrupt-names = "hc_irq", "pwr_irq", "status_irq"; cd-gpios = <&tlmm 54 0x1>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; status = "ok"; }; &soc { qcom,msm-ssc-sensors { compatible = "qcom,msm-ssc-sensors"; Loading arch/arm/boot/dts/qcom/sdm660-mtp.dtsi +59 −0 Original line number Diff line number Diff line Loading @@ -88,6 +88,65 @@ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; }; &sdhc_1 { /* device core power supply */ vdd-supply = <&pm660l_l4>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <200 570000>; /* device communication power supply */ vdd-io-supply = <&pm660_l8>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <200 325000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>; qcom,nonremovable; qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v"; status = "ok"; }; &sdhc_2 { /* device core power supply */ vdd-supply = <&pm660l_l5>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 900000>; /* device communication power supply */ vdd-io-supply = <&pm660l_l2>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <200 22000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; #address-cells = <0>; interrupt-parent = <&sdhc_2>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 125 0 1 &intc 0 221 0 2 &tlmm 54 0>; interrupt-names = "hc_irq", "pwr_irq", "status_irq"; cd-gpios = <&tlmm 54 0x1>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; status = "ok"; }; &soc { qcom,msm-ssc-sensors { compatible = "qcom,msm-ssc-sensors"; Loading arch/arm/boot/dts/qcom/sdm660-pinctrl.dtsi +74 −0 Original line number Diff line number Diff line Loading @@ -126,6 +126,80 @@ }; }; sdc2_clk_on: sdc2_clk_on { config { pins = "sdc2_clk"; drive-strength = <16>; /* 16 MA */ bias-disable; /* NO pull */ }; }; sdc2_clk_off: sdc2_clk_off { config { pins = "sdc2_clk"; bias-disable; /* NO pull */ drive-strength = <2>; /* 2 MA */ }; }; sdc2_cmd_on: sdc2_cmd_on { config { pins = "sdc2_cmd"; bias-pull-up; /* pull up */ drive-strength = <10>; /* 10 MA */ }; }; sdc2_cmd_off: sdc2_cmd_off { config { pins = "sdc2_cmd"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; sdc2_data_on: sdc2_data_on { config { pins = "sdc2_data"; bias-pull-up; /* pull up */ drive-strength = <10>; /* 10 MA */ }; }; sdc2_data_off: sdc2_data_off { config { pins = "sdc2_data"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; sdc2_cd_on: cd_on { mux { pins = "gpio54"; function = "gpio"; }; config { pins = "gpio54"; drive-strength = <2>; bias-pull-up; }; }; sdc2_cd_off: cd_off { mux { pins = "gpio54"; function = "gpio"; }; config { pins = "gpio54"; drive-strength = <2>; bias-disable; }; }; /* I2C CONFIGURATION */ i2c_1 { i2c_1_active: i2c_1_active { Loading arch/arm/boot/dts/qcom/sdm660-rumi.dts +34 −1 Original line number Diff line number Diff line Loading @@ -84,7 +84,7 @@ pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; qcom,clk-rates = <400000 20000000 25000000 50000000 192000000 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>; qcom,nonremovable; Loading @@ -93,6 +93,39 @@ status = "ok"; }; &sdhc_2 { /* device core power supply */ vdd-supply = <&pm660l_l5>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 900000>; /* device communication power supply */ vdd-io-supply = <&pm660l_l2>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <200 22000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; #address-cells = <0>; interrupt-parent = <&sdhc_2>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 125 0 1 &intc 0 221 0 2 &tlmm 54 0>; interrupt-names = "hc_irq", "pwr_irq", "status_irq"; cd-gpios = <&tlmm 54 0x1>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; status = "ok"; }; &clock_gcc { compatible = "qcom,dummycc"; clock-output-names = "gcc_clocks"; Loading arch/arm/boot/dts/qcom/sdm660-sim.dts +34 −1 Original line number Diff line number Diff line Loading @@ -68,7 +68,7 @@ pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; qcom,clk-rates = <400000 20000000 25000000 50000000 192000000 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>; qcom,nonremovable; Loading @@ -77,6 +77,39 @@ status = "ok"; }; &sdhc_2 { /* device core power supply */ vdd-supply = <&pm660l_l5>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 900000>; /* device communication power supply */ vdd-io-supply = <&pm660l_l2>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <200 22000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; #address-cells = <0>; interrupt-parent = <&sdhc_2>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 125 0 1 &intc 0 221 0 2 &tlmm 54 0>; interrupt-names = "hc_irq", "pwr_irq", "status_irq"; cd-gpios = <&tlmm 54 0x1>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; status = "ok"; }; &pm660_charger { status = "disabled"; }; Loading Loading
arch/arm/boot/dts/qcom/sdm660-cdp.dtsi +59 −0 Original line number Diff line number Diff line Loading @@ -88,6 +88,65 @@ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; }; &sdhc_1 { /* device core power supply */ vdd-supply = <&pm660l_l4>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <200 570000>; /* device communication power supply */ vdd-io-supply = <&pm660_l8>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <200 325000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>; qcom,nonremovable; qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v"; status = "ok"; }; &sdhc_2 { /* device core power supply */ vdd-supply = <&pm660l_l5>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 900000>; /* device communication power supply */ vdd-io-supply = <&pm660l_l2>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <200 22000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; #address-cells = <0>; interrupt-parent = <&sdhc_2>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 125 0 1 &intc 0 221 0 2 &tlmm 54 0>; interrupt-names = "hc_irq", "pwr_irq", "status_irq"; cd-gpios = <&tlmm 54 0x1>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; status = "ok"; }; &soc { qcom,msm-ssc-sensors { compatible = "qcom,msm-ssc-sensors"; Loading
arch/arm/boot/dts/qcom/sdm660-mtp.dtsi +59 −0 Original line number Diff line number Diff line Loading @@ -88,6 +88,65 @@ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; }; &sdhc_1 { /* device core power supply */ vdd-supply = <&pm660l_l4>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <200 570000>; /* device communication power supply */ vdd-io-supply = <&pm660_l8>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <200 325000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>; qcom,nonremovable; qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v"; status = "ok"; }; &sdhc_2 { /* device core power supply */ vdd-supply = <&pm660l_l5>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 900000>; /* device communication power supply */ vdd-io-supply = <&pm660l_l2>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <200 22000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; #address-cells = <0>; interrupt-parent = <&sdhc_2>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 125 0 1 &intc 0 221 0 2 &tlmm 54 0>; interrupt-names = "hc_irq", "pwr_irq", "status_irq"; cd-gpios = <&tlmm 54 0x1>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; status = "ok"; }; &soc { qcom,msm-ssc-sensors { compatible = "qcom,msm-ssc-sensors"; Loading
arch/arm/boot/dts/qcom/sdm660-pinctrl.dtsi +74 −0 Original line number Diff line number Diff line Loading @@ -126,6 +126,80 @@ }; }; sdc2_clk_on: sdc2_clk_on { config { pins = "sdc2_clk"; drive-strength = <16>; /* 16 MA */ bias-disable; /* NO pull */ }; }; sdc2_clk_off: sdc2_clk_off { config { pins = "sdc2_clk"; bias-disable; /* NO pull */ drive-strength = <2>; /* 2 MA */ }; }; sdc2_cmd_on: sdc2_cmd_on { config { pins = "sdc2_cmd"; bias-pull-up; /* pull up */ drive-strength = <10>; /* 10 MA */ }; }; sdc2_cmd_off: sdc2_cmd_off { config { pins = "sdc2_cmd"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; sdc2_data_on: sdc2_data_on { config { pins = "sdc2_data"; bias-pull-up; /* pull up */ drive-strength = <10>; /* 10 MA */ }; }; sdc2_data_off: sdc2_data_off { config { pins = "sdc2_data"; bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; }; sdc2_cd_on: cd_on { mux { pins = "gpio54"; function = "gpio"; }; config { pins = "gpio54"; drive-strength = <2>; bias-pull-up; }; }; sdc2_cd_off: cd_off { mux { pins = "gpio54"; function = "gpio"; }; config { pins = "gpio54"; drive-strength = <2>; bias-disable; }; }; /* I2C CONFIGURATION */ i2c_1 { i2c_1_active: i2c_1_active { Loading
arch/arm/boot/dts/qcom/sdm660-rumi.dts +34 −1 Original line number Diff line number Diff line Loading @@ -84,7 +84,7 @@ pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; qcom,clk-rates = <400000 20000000 25000000 50000000 192000000 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>; qcom,nonremovable; Loading @@ -93,6 +93,39 @@ status = "ok"; }; &sdhc_2 { /* device core power supply */ vdd-supply = <&pm660l_l5>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 900000>; /* device communication power supply */ vdd-io-supply = <&pm660l_l2>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <200 22000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; #address-cells = <0>; interrupt-parent = <&sdhc_2>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 125 0 1 &intc 0 221 0 2 &tlmm 54 0>; interrupt-names = "hc_irq", "pwr_irq", "status_irq"; cd-gpios = <&tlmm 54 0x1>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; status = "ok"; }; &clock_gcc { compatible = "qcom,dummycc"; clock-output-names = "gcc_clocks"; Loading
arch/arm/boot/dts/qcom/sdm660-sim.dts +34 −1 Original line number Diff line number Diff line Loading @@ -68,7 +68,7 @@ pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; qcom,clk-rates = <400000 20000000 25000000 50000000 192000000 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>; qcom,nonremovable; Loading @@ -77,6 +77,39 @@ status = "ok"; }; &sdhc_2 { /* device core power supply */ vdd-supply = <&pm660l_l5>; qcom,vdd-voltage-level = <2950000 2950000>; qcom,vdd-current-level = <15000 900000>; /* device communication power supply */ vdd-io-supply = <&pm660l_l2>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <200 22000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; #address-cells = <0>; interrupt-parent = <&sdhc_2>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 125 0 1 &intc 0 221 0 2 &tlmm 54 0>; interrupt-names = "hc_irq", "pwr_irq", "status_irq"; cd-gpios = <&tlmm 54 0x1>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; status = "ok"; }; &pm660_charger { status = "disabled"; }; Loading