Loading arch/arm/boot/dts/qcom/msm-pmfalcon.dtsi +23 −0 Original line number Diff line number Diff line Loading @@ -402,6 +402,29 @@ }; }; pmfalcon_pdphy: qcom,usb-pdphy@1700 { compatible = "qcom,qpnp-pdphy"; reg = <0x1700 0x100>; vdd-pdphy-supply = <&pm2falcon_l7>; vbus-supply = <&smb2_vbus>; vconn-supply = <&smb2_vconn>; interrupts = <0x0 0x17 0x0 IRQ_TYPE_EDGE_RISING>, <0x0 0x17 0x1 IRQ_TYPE_EDGE_RISING>, <0x0 0x17 0x2 IRQ_TYPE_EDGE_RISING>, <0x0 0x17 0x3 IRQ_TYPE_EDGE_RISING>, <0x0 0x17 0x4 IRQ_TYPE_EDGE_RISING>, <0x0 0x17 0x5 IRQ_TYPE_EDGE_RISING>, <0x0 0x17 0x6 IRQ_TYPE_EDGE_RISING>; interrupt-names = "sig-tx", "sig-rx", "msg-tx", "msg-rx", "msg-tx-failed", "msg-tx-discarded", "msg-rx-discarded"; }; pmfalcon_adc_tm: vadc@3400 { compatible = "qcom,qpnp-adc-tm-hc"; reg = <0x3400 0x100>; Loading arch/arm/boot/dts/qcom/msm8998-interposer-msmfalcon.dtsi +6 −6 Original line number Diff line number Diff line Loading @@ -1853,7 +1853,7 @@ <61 512 240000 800000>; qcom,dwc-usb3-msm-tx-fifo-size = <21288>; extcon = <&pmi8998_pdphy>; extcon = <&pmfalcon_pdphy>; clocks = <&clock_gcc clk_gcc_usb30_master_clk>, <&clock_gcc clk_gcc_cfg_noc_usb3_axi_clk>, Loading Loading @@ -1921,9 +1921,9 @@ <0x01fcb24c 0x4>; reg-names = "qusb_phy_base", "tcsr_clamp_dig_n_1p8"; vdd-supply = <&pm8998_l1>; vdda18-supply = <&pm8998_l12>; vdda33-supply = <&pm8998_l24>; vdd-supply = <&pm2falcon_l1>; vdda18-supply = <&pm2falcon_l10>; vdda33-supply = <&pm2falcon_l7>; qcom,vdd-voltage-level = <0 880000 880000>; qcom,qusb-phy-init-seq = /* <value reg_offset> */ Loading Loading @@ -1951,8 +1951,8 @@ reg-names = "qmp_phy_base", "vls_clamp_reg", "tcsr_usb3_dp_phymode"; vdd-supply = <&pm8998_l1>; core-supply = <&pm8998_l2>; vdd-supply = <&pm2falcon_l1>; core-supply = <&pmfalcon_l1>; qcom,vdd-voltage-level = <0 880000 880000>; qcom,vbus-valid-override; qcom,qmp-phy-init-seq = Loading arch/arm/boot/dts/qcom/msmfalcon-rumi.dts +4 −0 Original line number Diff line number Diff line Loading @@ -107,3 +107,7 @@ compatible = "qcom,dummycc"; clock-output-names = "gfx_clocks"; }; &pmfalcon_pdphy { status = "disabled"; }; arch/arm/boot/dts/qcom/msmfalcon-sim.dts +4 −0 Original line number Diff line number Diff line Loading @@ -81,3 +81,7 @@ &pmfalcon_fg { status = "disabled"; }; &pmfalcon_pdphy { status = "disabled"; }; Loading
arch/arm/boot/dts/qcom/msm-pmfalcon.dtsi +23 −0 Original line number Diff line number Diff line Loading @@ -402,6 +402,29 @@ }; }; pmfalcon_pdphy: qcom,usb-pdphy@1700 { compatible = "qcom,qpnp-pdphy"; reg = <0x1700 0x100>; vdd-pdphy-supply = <&pm2falcon_l7>; vbus-supply = <&smb2_vbus>; vconn-supply = <&smb2_vconn>; interrupts = <0x0 0x17 0x0 IRQ_TYPE_EDGE_RISING>, <0x0 0x17 0x1 IRQ_TYPE_EDGE_RISING>, <0x0 0x17 0x2 IRQ_TYPE_EDGE_RISING>, <0x0 0x17 0x3 IRQ_TYPE_EDGE_RISING>, <0x0 0x17 0x4 IRQ_TYPE_EDGE_RISING>, <0x0 0x17 0x5 IRQ_TYPE_EDGE_RISING>, <0x0 0x17 0x6 IRQ_TYPE_EDGE_RISING>; interrupt-names = "sig-tx", "sig-rx", "msg-tx", "msg-rx", "msg-tx-failed", "msg-tx-discarded", "msg-rx-discarded"; }; pmfalcon_adc_tm: vadc@3400 { compatible = "qcom,qpnp-adc-tm-hc"; reg = <0x3400 0x100>; Loading
arch/arm/boot/dts/qcom/msm8998-interposer-msmfalcon.dtsi +6 −6 Original line number Diff line number Diff line Loading @@ -1853,7 +1853,7 @@ <61 512 240000 800000>; qcom,dwc-usb3-msm-tx-fifo-size = <21288>; extcon = <&pmi8998_pdphy>; extcon = <&pmfalcon_pdphy>; clocks = <&clock_gcc clk_gcc_usb30_master_clk>, <&clock_gcc clk_gcc_cfg_noc_usb3_axi_clk>, Loading Loading @@ -1921,9 +1921,9 @@ <0x01fcb24c 0x4>; reg-names = "qusb_phy_base", "tcsr_clamp_dig_n_1p8"; vdd-supply = <&pm8998_l1>; vdda18-supply = <&pm8998_l12>; vdda33-supply = <&pm8998_l24>; vdd-supply = <&pm2falcon_l1>; vdda18-supply = <&pm2falcon_l10>; vdda33-supply = <&pm2falcon_l7>; qcom,vdd-voltage-level = <0 880000 880000>; qcom,qusb-phy-init-seq = /* <value reg_offset> */ Loading Loading @@ -1951,8 +1951,8 @@ reg-names = "qmp_phy_base", "vls_clamp_reg", "tcsr_usb3_dp_phymode"; vdd-supply = <&pm8998_l1>; core-supply = <&pm8998_l2>; vdd-supply = <&pm2falcon_l1>; core-supply = <&pmfalcon_l1>; qcom,vdd-voltage-level = <0 880000 880000>; qcom,vbus-valid-override; qcom,qmp-phy-init-seq = Loading
arch/arm/boot/dts/qcom/msmfalcon-rumi.dts +4 −0 Original line number Diff line number Diff line Loading @@ -107,3 +107,7 @@ compatible = "qcom,dummycc"; clock-output-names = "gfx_clocks"; }; &pmfalcon_pdphy { status = "disabled"; };
arch/arm/boot/dts/qcom/msmfalcon-sim.dts +4 −0 Original line number Diff line number Diff line Loading @@ -81,3 +81,7 @@ &pmfalcon_fg { status = "disabled"; }; &pmfalcon_pdphy { status = "disabled"; };