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Commit 7c123b6a authored by Lendacky, Thomas's avatar Lendacky, Thomas Committed by David S. Miller
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amd-xgbe: AMD 10GbE device bindings documentation



This patch provides the documentation of the device bindings
for the AMD 10GbE platform driver.

Signed-off-by: default avatarTom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e0a47d1f
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* AMD 10GbE PHY driver (amd-xgbe-phy)

Required properties:
- compatible: Should be "amd,xgbe-phy-seattle-v1a" and
  "ethernet-phy-ieee802.3-c45"
- reg: Address and length of the register sets for the device
   - SerDes Rx/Tx registers
   - SerDes integration registers (1/2)
   - SerDes integration registers (2/2)

Example:
	xgbe_phy@e1240800 {
		compatible = "amd,xgbe-phy-seattle-v1a", "ethernet-phy-ieee802.3-c45";
		reg = <0 0xe1240800 0 0x00400>,
		      <0 0xe1250000 0 0x00060>,
		      <0 0xe1250080 0 0x00004>;
	};
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* AMD 10GbE driver (amd-xgbe)

Required properties:
- compatible: Should be "amd,xgbe-seattle-v1a"
- reg: Address and length of the register sets for the device
   - MAC registers
   - PCS registers
- interrupt-parent: Should be the phandle for the interrupt controller
  that services interrupts for this device
- interrupts: Should contain the amd-xgbe interrupt
- clocks: Should be the DMA clock for the amd-xgbe device (used for
  calculating the correct Rx interrupt watchdog timer value on a DMA
  channel for coalescing)
- clock-names: Should be the name of the DMA clock, "dma_clk"
- phy-handle: See ethernet.txt file in the same directory
- phy-mode: See ethernet.txt file in the same directory

Optional properties:
- mac-address: mac address to be assigned to the device. Can be overridden
  by UEFI.

Example:
	xgbe@e0700000 {
		compatible = "amd,xgbe-seattle-v1a";
		reg = <0 0xe0700000 0 0x80000>,
		      <0 0xe0780000 0 0x80000>;
		interrupt-parent = <&gic>;
		interrupts = <0 325 4>;
		clocks = <&xgbe_clk>;
		clock-names = "dma_clk";
		phy-handle = <&phy>;
		phy-mode = "xgmii";
		mac-address = [ 02 a1 a2 a3 a4 a5 ];
	};