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Commit 7ad50395 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "defconfig: enable spss-utils driver for msmcobalt"

parents 5aa93671 fb272b7b

Documentation/devicetree/bindings/arm/msm/spss_utils.txt

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Qualcomm Technologies, Inc. Secure Processor SubSystem Utilities (spss_utils)



The Secure Processor SubSystem (SPSS) is a dedicated subsystem for security.

It has its own CPU, memories, and cryptographic engine.

It shall provide cryptographic services to other subsystems.

The SPSS firmware is loaded by PIL driver.

The communication with SPSS is done via spcom driver, using glink.



The spss_utils driver selects the SPSS firmware file,

according to a dedicated fuse and the platform HW version.



Required properties:

-compatible : should be "qcom,spss_utils"

-qcom,spss-fuse-addr: fuse register physical address

-qcom,spss-fuse-bit: fuse relevant bit

-qcom,spss-test-firmware-name: test firmware file name

-qcom,spss-prod-firmware-name: production firmware file name



Example:

   qcom,spss_utils {

      compatible = "qcom,spss-utils";



      qcom,spss-fuse-addr = <0x007841c4 0x4>;   /* spss test fuse physical address */

      qcom,spss-fuse-bit = <27>;

      qcom,spss-test-firmware-name = "spss1t";  /* 8 chars max */

      qcom,spss-prod-firmware-name = "spss1p";  /* 8 chars max */

   };

arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi

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@@ -746,6 +746,11 @@ 
	};

};



&spss_utils {

	qcom,spss-test-firmware-name = "spss2t";	/* 8 chars max */

	qcom,spss-prod-firmware-name = "spss2p";	/* 8 chars max */

};



&ufs1 {

	clock-names =

		"core_clk",

arch/arm/boot/dts/qcom/msmcobalt.dtsi

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@@ -1635,6 +1635,16 @@ 
		status = "ok";

	};



	spss_utils: qcom,spss_utils {

		compatible = "qcom,spss-utils";

		/* spss test fuse physical address */

		qcom,spss-fuse-addr = <0x007841c4 0x4>;

		qcom,spss-fuse-bit = <27>;

		qcom,spss-test-firmware-name = "spss";    /* default name */

		qcom,spss-prod-firmware-name = "spss1p";  /* 8 chars max */

		status = "ok";

	};



	sdhc_2: sdhci@c0a4900 {

		compatible = "qcom,sdhci-msm";

		reg = <0xc0a4900 0x314>, <0xc0a4000 0x800>;

arch/arm64/configs/msmcortex-perf_defconfig

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@@ -494,6 +494,7 @@ CONFIG_MSM_GLINK_SMD_XPRT=y 
CONFIG_MSM_GLINK_SMEM_NATIVE_XPRT=y

CONFIG_MSM_GLINK_SPI_XPRT=y

CONFIG_MSM_SPCOM=y

CONFIG_MSM_SPSS_UTILS=y

CONFIG_MSM_SMEM_LOGGING=y

CONFIG_MSM_SMP2P=y

CONFIG_MSM_SMP2P_TEST=y

arch/arm64/configs/msmcortex_defconfig

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@@ -506,6 +506,7 @@ CONFIG_MSM_GLINK_SMD_XPRT=y 
CONFIG_MSM_GLINK_SMEM_NATIVE_XPRT=y

CONFIG_MSM_GLINK_SPI_XPRT=y

CONFIG_MSM_SPCOM=y

CONFIG_MSM_SPSS_UTILS=y

CONFIG_MSM_SMEM_LOGGING=y

CONFIG_MSM_SMP2P=y

CONFIG_MSM_SMP2P_TEST=y