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Commit 791e28b5 authored by Tirupathi Reddy's avatar Tirupathi Reddy
Browse files

ARM: dts: msm: Enable ACD functionality for SDM660 silver cluster 



The adaptive clock distribution (ACD) mitigates the impact of
high-frequency supply voltage (VDD) droops on microprocessor
performance.

Program ACD functional configuration for silver cluster of sdm660.

Also add the voltage margin savings with ACD to the existing
APC0 CPR closed-loop voltage margins.

Also set CPR_RAMP_EN and VCTL_RAMP_EN bits to 1 in AVS control
register of silver cluster.

Change-Id: Iaff7769cd1e71bbeb773658d0649092bff6e8916
Signed-off-by: default avatarTirupathi Reddy <tirupath@codeaurora.org>
parent 6f56b2a9

arch/arm/boot/dts/qcom/sdm660-pm.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ 
		qcom,vctl-timeout-us = <500>;

		qcom,vctl-port = <0x0>;

		qcom,phase-port = <0x1>;

		qcom,saw2-avs-ctl = <0x1010031>;

		qcom,saw2-avs-ctl = <0x101c031>;

		qcom,saw2-avs-limit = <0x4580458>;

		qcom,pfm-port = <0x2>;

	};

arch/arm/boot/dts/qcom/sdm660-regulator.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -744,8 +744,8 @@ 
					< (-4000)  4000  7000  19000 (-8000)>;



				qcom,cpr-closed-loop-voltage-fuse-adjustment =

					<(-32000) (-30000) (-29000) (-23000)

					(-21000)>;

					<(-32000) (-30000) (-29000) (-38000)

					(-36000)>;



				qcom,cpr-floor-to-ceiling-max-range =

					<32000  32000  32000  40000  44000

arch/arm/boot/dts/qcom/sdm660.dtsi

+10 −2
Original line number Diff line number Diff line
@@ -1232,9 +1232,17 @@ 
		compatible = "qcom,clk-cpu-osm";

		reg = <0x179c0000 0x4000>, <0x17916000 0x1000>,

		      <0x17816000 0x1000>, <0x179d1000 0x1000>,

		      <0x00784130 0x8>;

		      <0x00784130 0x8>, <0x17914800 0x800>;

		reg-names = "osm", "pwrcl_pll", "perfcl_pll",

			    "apcs_common", "perfcl_efuse";

			    "apcs_common", "perfcl_efuse",

			    "pwrcl_acd";



		qcom,acdtd-val = <0x0000a111 0x0000a111>;

		qcom,acdcr-val = <0x002c5ffd 0x002c5ffd>;

		qcom,acdsscr-val = <0x00000901 0x00000901>;

		qcom,acdextint0-val = <0x2cf9ae8 0x2cf9ae8>;

		qcom,acdextint1-val = <0x2cf9afe 0x2cf9afe>;

		qcom,acdautoxfer-val = <0x00000015 0x00000015>;



		vdd-pwrcl-supply = <&apc0_pwrcl_vreg>;

		vdd-perfcl-supply = <&apc1_perfcl_vreg>;