Loading arch/arm/boot/dts/qcom/sdm660.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -1251,6 +1251,29 @@ < 2457600 >; }; ufs_ice: ufsice@1db0000 { compatible = "qcom,ice"; reg = <0x1db0000 0x8000>; qcom,enable-ice-clk; clock-names = "ufs_core_clk", "bus_clk", "iface_clk", "ice_core_clk"; clocks = <&clock_gcc GCC_UFS_AXI_CLK>, <&clock_gcc GCC_UFS_CLKREF_CLK>, <&clock_gcc GCC_UFS_AHB_CLK>, <&clock_gcc GCC_UFS_ICE_CORE_CLK>; qcom,op-freq-hz = <0>, <0>, <0>, <300000000>; vdd-hba-supply = <&gdsc_ufs>; qcom,msm-bus,name = "ufs_ice_noc"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <1 650 0 0>, /* No vote */ <1 650 1000 0>; /* Max. bandwidth */ qcom,bus-vector-names = "MIN", "MAX"; qcom,instance-type = "ufs"; }; sdhc_1: sdhci@c0c4000 { compatible = "qcom,sdhci-msm-v5"; reg = <0xc0c4000 0x1000>, <0xc0c5000 0x1000>; Loading Loading @@ -2129,6 +2152,7 @@ interrupts = <0 265 0>; phys = <&ufsphy1>; phy-names = "ufsphy"; ufs-qcom-crypto = <&ufs_ice>; clock-names = "core_clk", Loading Loading
arch/arm/boot/dts/qcom/sdm660.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -1251,6 +1251,29 @@ < 2457600 >; }; ufs_ice: ufsice@1db0000 { compatible = "qcom,ice"; reg = <0x1db0000 0x8000>; qcom,enable-ice-clk; clock-names = "ufs_core_clk", "bus_clk", "iface_clk", "ice_core_clk"; clocks = <&clock_gcc GCC_UFS_AXI_CLK>, <&clock_gcc GCC_UFS_CLKREF_CLK>, <&clock_gcc GCC_UFS_AHB_CLK>, <&clock_gcc GCC_UFS_ICE_CORE_CLK>; qcom,op-freq-hz = <0>, <0>, <0>, <300000000>; vdd-hba-supply = <&gdsc_ufs>; qcom,msm-bus,name = "ufs_ice_noc"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <1 650 0 0>, /* No vote */ <1 650 1000 0>; /* Max. bandwidth */ qcom,bus-vector-names = "MIN", "MAX"; qcom,instance-type = "ufs"; }; sdhc_1: sdhci@c0c4000 { compatible = "qcom,sdhci-msm-v5"; reg = <0xc0c4000 0x1000>, <0xc0c5000 0x1000>; Loading Loading @@ -2129,6 +2152,7 @@ interrupts = <0 265 0>; phys = <&ufsphy1>; phy-names = "ufsphy"; ufs-qcom-crypto = <&ufs_ice>; clock-names = "core_clk", Loading