Commit 773c5a0f authored Jan 13, 2015 by Roger Quadros Committed by Tony Lindgren Feb 24, 2015

ARM: dts: DRA7: Fix SATA PHY node



The sata_ref_clk is a reference clock to the SATA phy.
This fixes SATA malfunction across suspend/resume or when
SATA driver is used as a module.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

parent c517d838

arch/arm/boot/dts/dra7.dtsi

+2 −2

Original line number	Diff line number	Diff line
		@@ -1090,8 +1090,8 @@
		<0x4A096800 0x40>; /* pll_ctrl */
		reg-names = "phy_rx", "phy_tx", "pll_ctrl";
		ctrl-module = <&omap_control_sata>;
		clocks = <&sys_clkin1>;
		clock-names = "sysclk";
		clocks = <&sys_clkin1>, <&sata_ref_clk>;
		clock-names = "sysclk", "refclk";
		#phy-cells = <0>;
		};